Attachment #151445 for bug #264720

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extern void        RADEONDisableDisplays(ScrnInfoPtr pScrn);
extern void        RADEONGetPanelInfo(ScrnInfoPtr pScrn);
extern void        RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);
extern void        RADEONBlank(ScrnInfoPtr pScrn, Bool Blank);
extern void        RADEONBlank(ScrnInfoPtr pScrn);
extern void        RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
						   int PowerManagementMode,
						   int flags);
extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);
extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
extern RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num);
extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
				  RADEONMonitorType DisplayType, int crtc2);




    }
}

static void
RADEONConnectorReverse(RADEONEntPtr pRADEONEnt)
{
    RADEONConnector *connector;

    connector = pRADEONEnt->PortInfo[0];
    pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
    pRADEONEnt->PortInfo[1] = connector;
}

/*
 * initialise the static data sos we don't have to re-do at randr change */
void RADEONSetupConnectors(ScrnInfoPtr pScrn)

    }

    /* always make TMDS_INT port first*/
    if (pRADEONEnt->PortInfo[1]->TMDSType == TMDS_INT)
	RADEONConnectorReverse(pRADEONEnt);
    else if ((pRADEONEnt->PortInfo[0]->TMDSType != TMDS_INT &&
        pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
        pRADEONEnt->PortInfo[1] = connector;
    } else if ((pRADEONEnt->PortInfo[0]->TMDSType != TMDS_INT &&
                pRADEONEnt->PortInfo[1]->TMDSType != TMDS_INT)) {
        /* no TMDS_INT port, make primary DAC port first */
	/* On my Inspiron 8600 both internal and external ports are

	   swap when the first port is not DAC_PRIMARY */
        if ((!(pRADEONEnt->PortInfo[0]->ConnectorType == CONNECTOR_PROPRIETARY)) &&  (pRADEONEnt->PortInfo[1]->DACType == DAC_PRIMARY) &&
	     (pRADEONEnt->PortInfo[0]->DACType != DAC_PRIMARY)) {
	    RADEONConnectorReverse(pRADEONEnt);
            connector = pRADEONEnt->PortInfo[0];
            pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
            pRADEONEnt->PortInfo[1] = connector;
        }
    }


	    pRADEONEnt->PortInfo[1]->DACType = DAC_UNKNOWN;
	    pRADEONEnt->PortInfo[1]->TMDSType = TMDS_UNKNOWN;
	    pRADEONEnt->PortInfo[1]->ConnectorType = CONNECTOR_NONE;

	    pRADEONEnt->PortInfo[0]->crtc_num = 1;
	    pRADEONEnt->PortInfo[1]->crtc_num = 2;
	    
	    return;
	}
	

    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    Bool head_reversed = FALSE;
    RADEONConnector *connector;

    info->MergeType = MT_NONE;

    if (!info->IsSecondary) {
      RADEONQueryConnectedDisplays(pScrn);

      pRADEONEnt->PortInfo[0]->crtc_num = 1;
      pRADEONEnt->PortInfo[1]->crtc_num = 2;

      xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
		 "Port1:\n Monitor   -- %s\n Connector -- %s\n DAC Type  -- %s\n TMDS Type -- %s\n DDC Type  -- %s\n", 
		 MonTypeName[pRADEONEnt->PortInfo[0]->MonType+1], 

	if (pRADEONEnt->PortInfo[0]->MonType == MT_NONE) {
	    if (pRADEONEnt->PortInfo[1]->MonType != MT_NONE) {
		/* Only one detected on secondary, let it to be primary */
		if (!head_reversed)
		    RADEONConnectorReverse(pRADEONEnt);
		head_reversed = TRUE;
	    } else {
		/* None detected, Default to a CRT connected */

	    (pRADEONEnt->PortInfo[1]->MonType == MT_CRT)) {
	    if (!(INREG(RADEON_LVDS_GEN_CNTL) & RADEON_LVDS_ON)) {
		/* LCD is switched off, don't turn it on, otherwise it may casue lockup due to SS issue. */
		if (!head_reversed)
		    RADEONConnectorReverse(pRADEONEnt);
		pRADEONEnt->PortInfo[0]->MonType = MT_NONE;
		head_reversed = TRUE;
		pRADEONEnt->PortInfo[0]->MonType = MT_NONE;
		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "LCD is switched off, only CRT will be used\n");
	    }
	}

		    */
		    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Reverse Display cannot be used for mobility chip\n");
		} else {
		    if (!head_reversed)
			RADEONConnectorReverse(pRADEONEnt);
		    head_reversed = TRUE;
		    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Primary and Secondary mapping is reversed\n");
		}


    if(pRADEONEnt->HasCRTC2) {
	if(info->IsSecondary) {
	    connector = RADEONGetCrtcConnector(pScrn, 2);
  	    pRADEONEnt->Controller[1]->binding = 2;
	    info->DisplayType = pRADEONEnt->PortInfo[1]->MonType;
	    pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
		pScrn->monitor->DDC = connector->MonInfo;
	    }
	} else {
	    connector = RADEONGetCrtcConnector(pScrn, 1);
  	    pRADEONEnt->Controller[0]->binding = 1;
	    info->DisplayType = pRADEONEnt->PortInfo[0]->MonType;
	    pScrn->monitor->DDC = pRADEONEnt->PortInfo[0]->MonInfo;
		pScrn->monitor->DDC = connector->MonInfo;
	    }
	}

	if(!pRADEONEnt->HasSecondary) {
	    info->MergeType = pRADEONEnt->PortInfo[1]->MonType;
	    if (connector)
		info->MergeType = connector->MonType;
	    if (info->MergeType)
  	    	pRADEONEnt->Controller[1]->binding = 1;
	} 
    } else {
	connector = RADEONGetCrtcConnector(pScrn, 1);
	if (connector) {
	    if (connector->MonType == MT_NONE) 
		connector->MonType = MT_CRT;
	    info->DisplayType = connector->MonType; 
	    pScrn->monitor->DDC = connector->MonInfo;
	}
    } else {
	if (pRADEONEnt->PortInfo[0]->MonType == MT_NONE)
	    pRADEONEnt->PortInfo[0]->MonType = MT_CRT;
	info->DisplayType = pRADEONEnt->PortInfo[0]->MonType;
	pScrn->monitor->DDC = pRADEONEnt->PortInfo[0]->MonInfo;

	pRADEONEnt->PortInfo[1]->MonType = MT_NONE;
	pRADEONEnt->Controller[1]->binding = 1;
    }

    if (!info->IsSecondary) {
	connector = RADEONGetCrtcConnector(pScrn, 2);
        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Primary Head:   Port%d ---- \n", head_reversed?2:1);
	if (pRADEONEnt->PortInfo[1]->MonType != MT_NONE)
            xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Port%d ----\n", head_reversed?1:2);
 	else
            xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Not used ----\n");

    RADEONInitDispBandwidth2(pScrn, info, info2, mode1, mode2);
}

static void
RADEONOutputsBlank(ScrnInfoPtr pScrn, RADEONConnector *pPort, Bool Blank)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;

    switch(pPort->MonType) {
    case MT_LCD:
	if (Blank)
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_DISPLAY_DIS, ~RADEON_LVDS_DISPLAY_DIS);
	else
	    OUTREGP(RADEON_LVDS_GEN_CNTL, 0, ~RADEON_LVDS_DISPLAY_DIS);
        break;

    case MT_CRT:
	if ((info->ChipFamily == CHIP_FAMILY_R200) && (pPort->DACType == DAC_TVDAC)) {
	    if (Blank)
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
	    else
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
	}
        break;
    case MT_DFP:
        if (pPort->TMDSType == TMDS_EXT) {
	    if (Blank)
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
	    else
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
        } else {
	    if (Blank)
		OUTREGP(RADEON_FP_GEN_CNTL, RADEON_FP_BLANK_EN, ~RADEON_FP_BLANK_EN);
	    else
		OUTREGP(RADEON_FP_GEN_CNTL, 0, ~RADEON_FP_BLANK_EN);
	}
        break;
    case MT_NONE:
    default:
        break;
    }
}

static void
RADEONCRTC1Blank(RADEONInfoPtr info, Bool Blank)
{
    unsigned char *RADEONMMIO = info->MMIO;

    if (Blank)
	OUTREGP(RADEON_CRTC_EXT_CNTL,
		RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS,
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS));
    else
	OUTREGP(RADEON_CRTC_EXT_CNTL, 0,
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS));
}

static void
RADEONCRTC2Blank(RADEONInfoPtr info, Bool Blank)
{
    unsigned char *RADEONMMIO = info->MMIO;

    if (Blank)
	OUTREGP(RADEON_CRTC2_GEN_CNTL,
		RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS,
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
    else
	OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
}

/* Blank screen */
void RADEONBlank(ScrnInfoPtr pScrn, Bool Blank)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    RADEONConnector *pPort;

    if (!pRADEONEnt->HasSecondary ||
	(pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && (!info->IsSecondary))) {

	RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[0], Blank);
	RADEONCRTC1Blank(info, Blank);

	if (!pRADEONEnt->HasCRTC2)
	    return;
		 RADEON_CRTC_HSYNC_DIS,
		 ~(RADEON_CRTC_DISPLAY_DIS |
		   RADEON_CRTC_VSYNC_DIS | 
		   RADEON_CRTC_HSYNC_DIS));

	if (!pRADEONEnt->HasCRTC2) return;

	if (pRADEONEnt->Controller[1]->binding == 1) {
	    RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[1], Blank);
	    RADEONCRTC2Blank(info, Blank);
		RADEONBlankSet(pScrn, pPort);
	    OUTREGP (RADEON_CRTC2_GEN_CNTL,
		     RADEON_CRTC2_DISP_DIS |
		     RADEON_CRTC2_VSYNC_DIS |
		     RADEON_CRTC2_HSYNC_DIS,
		     ~(RADEON_CRTC2_DISP_DIS |
		       RADEON_CRTC2_VSYNC_DIS | 
		       RADEON_CRTC2_HSYNC_DIS));
	}
    }

    if ((pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && info->IsSecondary)) {
	RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[1], Blank);
	RADEONCRTC2Blank(info, Blank);
	    RADEONBlankSet(pScrn, pPort);
	OUTREGP (RADEON_CRTC2_GEN_CNTL,
		 RADEON_CRTC2_DISP_DIS |
		 RADEON_CRTC2_VSYNC_DIS |
		 RADEON_CRTC2_HSYNC_DIS,
		 ~(RADEON_CRTC2_DISP_DIS |
		   RADEON_CRTC2_VSYNC_DIS | 
		   RADEON_CRTC2_HSYNC_DIS));
    }
}

static void
RADEONOutputsDPMS(ScrnInfoPtr pScrn, RADEONConnector *pPort, int Mode)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONMonitorType MonType;
    RADEONTmdsType TmdsType;
    RADEONDacType DacType;

    MonType = pPort->MonType;
    TmdsType = pPort->TMDSType;
    DacType = pPort->DACType;

    switch (MonType) {
    case MT_LCD:
	if (Mode == DPMSModeOn) {
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_BLON, ~RADEON_LVDS_BLON);
	    usleep (info->PanelPwrDly * 1000);
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_ON, ~RADEON_LVDS_ON);
	} else {
	    unsigned int tmpPixclksCntl = INPLL(pScrn, RADEON_PIXCLKS_CNTL);

	    /* Asic bug, when turning off LVDS_ON, we have to make sure
	       RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off */
	    if (info->IsMobility || info->IsIGP)
		OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
	    OUTREGP(RADEON_LVDS_GEN_CNTL, 0, ~(RADEON_LVDS_BLON | RADEON_LVDS_ON));
	    if (info->IsMobility || info->IsIGP)
		OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmpPixclksCntl);
	}
	break;
    case MT_DFP:
	if (Mode == DPMSModeOn) {
	    if (TmdsType == TMDS_EXT) {
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);
		if (info->ChipFamily >= CHIP_FAMILY_R200)
		    OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_DVO_EN, ~RADEON_FP2_DVO_EN);
	    } else
		OUTREGP(RADEON_FP_GEN_CNTL, (RADEON_FP_FPON | RADEON_FP_TMDS_EN),
			~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
	} else {
	    if (TmdsType == TMDS_EXT) {
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);
		if (info->ChipFamily >= CHIP_FAMILY_R200) {
		    OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DVO_EN);
		}
	    } else
		OUTREGP(RADEON_FP_GEN_CNTL, 0, ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
	}
	break;
    case MT_CRT:
    default:
	RADEONDacPowerSet(pScrn, (Mode == DPMSModeOn), (DacType == DAC_PRIMARY));
	break;
    }
}

void
RADEONCRTC1DPMS(RADEONInfoPtr info, int Mode)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    RADEONConnector *pPort;

    switch (Mode) {
    case DPMSModeOn:
	/* Screen: On; HSync: On, VSync: On */
	OUTREGP(RADEON_CRTC_EXT_CNTL, 0,
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	break;
    case DPMSModeStandby:
	/* Screen: Off; HSync: Off, VSync: On */
	OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS),
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	break;
    case DPMSModeSuspend:
	/* Screen: Off; HSync: On, VSync: Off */
	OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS),
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	break;
    case DPMSModeOff:
    default:
	/* Screen: Off; HSync: Off, VSync: Off */
	OUTREGP(RADEON_CRTC_EXT_CNTL,
		(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS),
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	break;
    }

    if ((pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && info->IsSecondary)) {
	pPort = RADEONGetCrtcConnector(pScrn, 2);
	if (pPort)
	    RADEONUnblankSet(pScrn, pPort);
	OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		~(RADEON_CRTC2_DISP_DIS |
		  RADEON_CRTC2_VSYNC_DIS |
		  RADEON_CRTC2_HSYNC_DIS));
    }
}

static void RADEONDPMSSetOn(ScrnInfoPtr pScrn, RADEONConnector *pPort)
{
  RADEONInfoPtr  info       = RADEONPTR(pScrn);
  unsigned char *RADEONMMIO = info->MMIO;
  RADEONMonitorType MonType;
  RADEONTmdsType TmdsType;
  RADEONDacType DacType;

  MonType = pPort->MonType;
  TmdsType = pPort->TMDSType;
  DacType = pPort->DACType;

  switch(MonType) {
  case MT_LCD:
    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_BLON, ~RADEON_LVDS_BLON);
    usleep (info->PanelPwrDly * 1000);
    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_ON, ~RADEON_LVDS_ON);
    break;
  case MT_DFP:
    if (TmdsType == TMDS_EXT) {
      OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
      OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);
      if (info->ChipFamily >= CHIP_FAMILY_R200) {
	OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DVO_EN, 
		 ~RADEON_FP2_DVO_EN);
      }
    } else
      OUTREGP (RADEON_FP_GEN_CNTL, (RADEON_FP_FPON | RADEON_FP_TMDS_EN),
	       ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
    break;
  case MT_CRT:
  default:
    RADEONDacPowerSet(pScrn, TRUE, (DacType == DAC_PRIMARY));
    break;
  }
}

void
RADEONCRTC2DPMS(RADEONInfoPtr info, int Mode)
{
    unsigned char *RADEONMMIO = info->MMIO;

    switch (Mode) {
    case DPMSModeOn:
	/* Screen: On; HSync: On, VSync: On */
	OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	break;
    case DPMSModeStandby:
	/* Screen: Off; HSync: Off, VSync: On */
	OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	break;
    case DPMSModeSuspend:
	/* Screen: Off; HSync: On, VSync: Off */
	OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	break;
    case DPMSModeOff:
    default:
	/* Screen: Off; HSync: Off, VSync: Off */
	OUTREGP(RADEON_CRTC2_GEN_CNTL,
		(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS),
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	break;
    }
    break;
  case MT_DFP:
    if (TmdsType == TMDS_EXT) {
      OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
      OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);
      if (info->ChipFamily >= CHIP_FAMILY_R200) {
	OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DVO_EN);
      }
    } else
      OUTREGP (RADEON_FP_GEN_CNTL, 0, ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
    break;
  case MT_CRT:
  default:
    RADEONDacPowerSet(pScrn, FALSE, (DacType == DAC_PRIMARY));
    break;
  }
}


/* Sets VESA Display Power Management Signaling (DPMS) Mode */
void
RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
					    int flags)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONConnector *pPort;

    if (!pScrn->vtSema)
	return;

    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
		   "RADEONDisplayPowerManagementSet(%d,0x%x)\n",
		   PowerManagementMode, flags);

#ifdef XF86DRI
    if (info->CPStarted)
	DRILock(pScrn->pScreen, 0);
#endif

    if (info->accelOn)

    if (info->FBDev) {
	fbdevHWDPMSSet(pScrn, PowerManagementMode, flags);
    } else {
	if (info->IsSecondary) {
	    RADEONCRTC2DPMS(info, PowerManagementMode);
	    RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[1], PowerManagementMode);
	} else {
	    RADEONCRTC1DPMS(info, PowerManagementMode);
	    RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[0], PowerManagementMode);

	switch (PowerManagementMode) {
	case DPMSModeOn:
	    /* Screen: On; HSync: On, VSync: On */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);
	    }
	    break;

	case DPMSModeStandby:
	    /* Screen: Off; HSync: Off, VSync: On */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL,
			(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
			~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
			    (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
			    ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL,
			(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS),
			~mask1);
	    }
	    break;

	case DPMSModeSuspend:
	    /* Screen: Off; HSync: On, VSync: Off */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL,
			(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
			~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
			    (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
			    ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL,
			(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS),
			~mask1);
	    }
	    break;

	case DPMSModeOff:
	    /* Screen: Off; HSync: Off, VSync: Off */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);
	    }
	    break;
	}

	if (PowerManagementMode == DPMSModeOn) {
  	    pPort = RADEONGetCrtcConnector(pScrn, info->IsSecondary ? 2 : 1);
   	    RADEONDPMSSetOn(pScrn, pPort);
	    if (pRADEONEnt->Controller[1]->binding == 1) {
	      pPort = RADEONGetCrtcConnector(pScrn, 2);
	      RADEONDPMSSetOn(pScrn, pPort);
	    }
	} else if ((PowerManagementMode == DPMSModeOff) ||
		   (PowerManagementMode == DPMSModeSuspend) ||
		   (PowerManagementMode == DPMSModeStandby)) {
	    pPort = RADEONGetCrtcConnector(pScrn, info->IsSecondary ? 2 : 1);
	    RADEONDPMSSetOff(pScrn, pPort);
	    if (pRADEONEnt->Controller[1]->binding == 1) {
		RADEONCRTC2DPMS(info, PowerManagementMode);
		RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[1], PowerManagementMode);
	    }
	}
    }

#ifdef XF86DRI
    if (info->CPStarted)
	DRIUnlock(pScrn->pScreen);
#endif
}


Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    int i;

    if (pRADEONEnt->PortInfo[0])
        return TRUE;

    /* for now always allocate both connectors */
    pRADEONEnt->PortInfo[0] = xcalloc(sizeof(RADEONConnector), 1);
    if (!pRADEONEnt->PortInfo[0])
	return FALSE;

    pRADEONEnt->PortInfo[1] = xcalloc(sizeof(RADEONConnector), 1);
    if (!pRADEONEnt->PortInfo[1]) {
	xfree(pRADEONEnt->PortInfo[0]);
	return FALSE;
    }

    return TRUE;
}

RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);

    if (pRADEONEnt->PortInfo[0]->crtc_num == crtc_num)
      return pRADEONEnt->PortInfo[0];
    else if (pRADEONEnt->PortInfo[1]->crtc_num == crtc_num)
      return pRADEONEnt->PortInfo[1];
    return NULL;
}




	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);

    /* don't use RMX if we have a dual-tmds panels */
    if (pRADEONEnt->PortInfo[1]->MonType == MT_DFP)
	info->ddc_mode = TRUE;
	    info->ddc_mode = TRUE;
    /* don't use RMX if we are Dell Server */  
    if (info->IsDellServer)
	info->ddc_mode = TRUE;

	    RADEONRestoreCrtc2Registers(pScrn, restore);
	    RADEONRestorePLL2Registers(pScrn, restore);
	    RADEONRestoreFPRegisters(pScrn, restore);
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
	    pCRTC2->IsActive = TRUE;
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC2->IsActive = TRUE;
	    }
	} else {
	    RADEONRestoreMemMapRegisters(pScrn, restore);
	    RADEONRestoreCommonRegisters(pScrn, restore);

            RADEONRestoreCrtcRegisters(pScrn, restore);
            RADEONRestorePLLRegisters(pScrn, restore);
	    RADEONRestoreFPRegisters(pScrn, restore);
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
	    pCRTC1->IsActive = TRUE;
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC1->IsActive = TRUE;
	    }
	    if (pCRTC2->binding == 1) {
		RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
		pCRTC2->IsActive = TRUE;
		    RADEONEnableDisplay(pScrn, pPort, TRUE);
		    pCRTC2->IsActive = TRUE;
		}
	    }
	}
    } else {

	RADEONRestoreCrtcRegisters(pScrn, restore);
	RADEONRestorePLLRegisters(pScrn, restore);
	RADEONRestoreFPRegisters(pScrn, restore);
	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
	pCRTC1->IsActive = TRUE;
	if (pCRTC2->binding == 1) {
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
	    pCRTC2->IsActive = TRUE;
	if ((pCRTC2->binding == 1) || pRADEONEnt->HasSecondary) {
	    pPort = RADEONGetCrtcConnector(pScrn, 2);
	    if (pPort) {
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC2->IsActive = TRUE;
	    }
	}
    }


	fbdevHWRestore(pScrn);
	return;
    }
    RADEONBlank(pScrn, TRUE);

    OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
    RADEONPllErrataAfterIndex(info);

    }
}

static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, Bool IsPrimary)
{
    Bool IsPrimary = crtc_num == 1 ? TRUE : FALSE;

    if (pPort->MonType == MT_CRT) {
	if (pPort->DACType == DAC_PRIMARY) {
	    RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);

	    RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);
	}
    } else if (pPort->MonType == MT_LCD) {
	if (IsPrimary)
	    RADEONInitRMXRegisters(pScrn, save, mode);
	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);
    } else if (pPort->MonType == MT_DFP) {
	if (IsPrimary)
	    RADEONInitRMXRegisters(pScrn, save, mode);
	if (pPort->TMDSType == TMDS_INT) {
	    RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);

    }

    /* get the output connected to this CRTC */
    RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], TRUE);
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 1);
    } else if (pRADEONEnt->PortInfo[1]->crtc_num == 1) {
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 1);
    }

    if (info->IsDellServer) {
	save->dac2_cntl = info->SavedReg.dac2_cntl;

    save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;

    /* get the output connected to this CRTC */
    RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], FALSE);
    
    } else if (pRADEONEnt->PortInfo[1]->crtc_num == 2) {
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 2);
    }

    /* We must set SURFACE_CNTL properly on the second screen too */
    save->surface_cntl = 0;
#if X_BYTE_ORDER == X_BIG_ENDIAN

    if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;

    pScrn->vtSema = TRUE;
    RADEONBlank(pScrn, TRUE);
    RADEONRestoreMode(pScrn, &info->ModeReg);
    RADEONBlank(pScrn, FALSE);

    info->CurrentLayout.mode = mode;


    if (unblank) SetTimeSinceLastInputEvent();

    if ((pScrn != NULL) && pScrn->vtSema) {
	if (unblank)
	    RADEONBlank(pScrn, FALSE);
	else
	    RADEONBlank(pScrn, TRUE);
    }
    return TRUE;
}

RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)
{
    RADEONInfoPtr      info       = RADEONPTR(pScrn);
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    char        *strptr;
    char	*default_hsync = "28-33";
    char	*default_vrefresh = "43-72";

	info->MergedFB = FALSE;
        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
        "Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");
    } else if (!pRADEONEnt->PortInfo[1]->MonInfo) {
	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
		   "Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");
	default_range = TRUE;
	    default_range = TRUE;
	}
    }

    if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {


	  /* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */

	  info->CRT2pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
	  info->CRT2pScrn->monitor->DDC = connector ? connector->MonInfo : NULL;

          if (default_range) {
             RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);

Lines 119-127 typedef struct Link Here

(-)a/src/radeon_probe.h (-4 lines)
119	RADEONConnectorType ConnectorType;	119	RADEONConnectorType ConnectorType;
120	RADEONMonitorType MonType;	120	RADEONMonitorType MonType;
121	xf86MonPtr MonInfo;	121	xf86MonPtr MonInfo;
122
123	/* one connector can be bound to one CRTC */
124	int crtc_num;
125	} RADEONConnector;	122	} RADEONConnector;
126		123
127		124
128	-

Return to bug 264720

Lines 2034-2042 static Bool RADEONPreInitModes(ScrnInfoP Link Here

(-)a/src/radeon_driver.c (-59 / +32 lines)
2034	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);	2034	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);
2035		2035
2036	/* don't use RMX if we have a dual-tmds panels */	2036	/* don't use RMX if we have a dual-tmds panels */
2037	if ((connector = RADEONGetCrtcConnector(pScrn, 2)))	2037	if (pRADEONEnt->PortInfo[1]->MonType == MT_DFP)
2038	if (connector->MonType == MT_DFP)	2038	info->ddc_mode = TRUE;
2039	info->ddc_mode = TRUE;
2040	/* don't use RMX if we are Dell Server */	2039	/* don't use RMX if we are Dell Server */
2041	if (info->IsDellServer)	2040	if (info->IsDellServer)
2042	info->ddc_mode = TRUE;	2041	info->ddc_mode = TRUE;
Lines 5176-5186 static void RADEONRestoreMode(ScrnInfoPt Link Here
5176	RADEONRestoreCrtc2Registers(pScrn, restore);	5175	RADEONRestoreCrtc2Registers(pScrn, restore);
5177	RADEONRestorePLL2Registers(pScrn, restore);	5176	RADEONRestorePLL2Registers(pScrn, restore);
5178	RADEONRestoreFPRegisters(pScrn, restore);	5177	RADEONRestoreFPRegisters(pScrn, restore);
5179	pPort = RADEONGetCrtcConnector(pScrn, 2);	5178	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5180	if (pPort) {	5179	pCRTC2->IsActive = TRUE;
5181	RADEONEnableDisplay(pScrn, pPort, TRUE);
5182	pCRTC2->IsActive = TRUE;
5183	}
5184	} else {	5180	} else {
5185	RADEONRestoreMemMapRegisters(pScrn, restore);	5181	RADEONRestoreMemMapRegisters(pScrn, restore);
5186	RADEONRestoreCommonRegisters(pScrn, restore);	5182	RADEONRestoreCommonRegisters(pScrn, restore);
Lines 5192-5208 static void RADEONRestoreMode(ScrnInfoPt Link Here
5192	RADEONRestoreCrtcRegisters(pScrn, restore);	5188	RADEONRestoreCrtcRegisters(pScrn, restore);
5193	RADEONRestorePLLRegisters(pScrn, restore);	5189	RADEONRestorePLLRegisters(pScrn, restore);
5194	RADEONRestoreFPRegisters(pScrn, restore);	5190	RADEONRestoreFPRegisters(pScrn, restore);
5195	pPort = RADEONGetCrtcConnector(pScrn, 1);	5191	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
5196	if (pPort) {	5192	pCRTC1->IsActive = TRUE;
5197	RADEONEnableDisplay(pScrn, pPort, TRUE);
5198	pCRTC1->IsActive = TRUE;
5199	}
5200	if (pCRTC2->binding == 1) {	5193	if (pCRTC2->binding == 1) {
5201	pPort = RADEONGetCrtcConnector(pScrn, 2);	5194	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5202	if (pPort) {	5195	pCRTC2->IsActive = TRUE;
5203	RADEONEnableDisplay(pScrn, pPort, TRUE);
5204	pCRTC2->IsActive = TRUE;
5205	}
5206	}	5196	}
5207	}	5197	}
5208	} else {	5198	} else {
Lines 5216-5232 static void RADEONRestoreMode(ScrnInfoPt Link Here
5216	RADEONRestoreCrtcRegisters(pScrn, restore);	5206	RADEONRestoreCrtcRegisters(pScrn, restore);
5217	RADEONRestorePLLRegisters(pScrn, restore);	5207	RADEONRestorePLLRegisters(pScrn, restore);
5218	RADEONRestoreFPRegisters(pScrn, restore);	5208	RADEONRestoreFPRegisters(pScrn, restore);
5219	pPort = RADEONGetCrtcConnector(pScrn, 1);	5209	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
5220	if (pPort) {	5210	pCRTC1->IsActive = TRUE;
5221	RADEONEnableDisplay(pScrn, pPort, TRUE);	5211	if (pCRTC2->binding == 1) {
5222	pCRTC1->IsActive = TRUE;	5212	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5223	}	5213	pCRTC2->IsActive = TRUE;
5224	if ((pCRTC2->binding == 1) \|\| pRADEONEnt->HasSecondary) {
5225	pPort = RADEONGetCrtcConnector(pScrn, 2);
5226	if (pPort) {
5227	RADEONEnableDisplay(pScrn, pPort, TRUE);
5228	pCRTC2->IsActive = TRUE;
5229	}
5230	}	5214	}
5231	}	5215	}
5232		5216
Lines 5538-5544 static void RADEONRestore(ScrnInfoPtr pS Link Here
5538	fbdevHWRestore(pScrn);	5522	fbdevHWRestore(pScrn);
5539	return;	5523	return;
5540	}	5524	}
5541	RADEONBlank(pScrn);	5525	RADEONBlank(pScrn, TRUE);
5542		5526
5543	OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);	5527	OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
5544	RADEONPllErrataAfterIndex(info);	5528	RADEONPllErrataAfterIndex(info);
Lines 5910-5919 static void RADEONInitDAC2Registers(Scrn Link Here
5910	}	5894	}
5911	}	5895	}
5912		5896
5913	static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, int crtc_num)	5897	static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, Bool IsPrimary)
5914	{	5898	{
5915	Bool IsPrimary = crtc_num == 1 ? TRUE : FALSE;
5916
5917	if (pPort->MonType == MT_CRT) {	5899	if (pPort->MonType == MT_CRT) {
5918	if (pPort->DACType == DAC_PRIMARY) {	5900	if (pPort->DACType == DAC_PRIMARY) {
5919	RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);	5901	RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);
Lines 5921-5931 static void RADEONInitOutputRegisters(Sc Link Here
5921	RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);	5903	RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);
5922	}	5904	}
5923	} else if (pPort->MonType == MT_LCD) {	5905	} else if (pPort->MonType == MT_LCD) {
5924	if (crtc_num == 1)	5906	if (IsPrimary)
5925	RADEONInitRMXRegisters(pScrn, save, mode);	5907	RADEONInitRMXRegisters(pScrn, save, mode);
5926	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);	5908	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);
5927	} else if (pPort->MonType == MT_DFP) {	5909	} else if (pPort->MonType == MT_DFP) {
5928	if (crtc_num == 1)	5910	if (IsPrimary)
5929	RADEONInitRMXRegisters(pScrn, save, mode);	5911	RADEONInitRMXRegisters(pScrn, save, mode);
5930	if (pPort->TMDSType == TMDS_INT) {	5912	if (pPort->TMDSType == TMDS_INT) {
5931	RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);	5913	RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);
Lines 6095-6105 static Bool RADEONInitCrtcRegisters(Scrn Link Here
6095	}	6077	}
6096		6078
6097	/* get the output connected to this CRTC */	6079	/* get the output connected to this CRTC */
6098	if (pRADEONEnt->PortInfo[0]->crtc_num == 1) {	6080	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], TRUE);
6099	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 1);
6100	} else if (pRADEONEnt->PortInfo[1]->crtc_num == 1) {
6101	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 1);
6102	}
6103		6081
6104	if (info->IsDellServer) {	6082	if (info->IsDellServer) {
6105	save->dac2_cntl = info->SavedReg.dac2_cntl;	6083	save->dac2_cntl = info->SavedReg.dac2_cntl;
Lines 6230-6241 static Bool RADEONInitCrtc2Registers(Scr Link Here
6230	save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;	6208	save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;
6231		6209
6232	/* get the output connected to this CRTC */	6210	/* get the output connected to this CRTC */
6233	if (pRADEONEnt->PortInfo[0]->crtc_num == 2) {	6211	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], FALSE);
6234	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 2);	6212
6235	} else if (pRADEONEnt->PortInfo[1]->crtc_num == 2) {
6236	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 2);
6237	}
6238
6239	/* We must set SURFACE_CNTL properly on the second screen too */	6213	/* We must set SURFACE_CNTL properly on the second screen too */
6240	save->surface_cntl = 0;	6214	save->surface_cntl = 0;
6241	#if X_BYTE_ORDER == X_BIG_ENDIAN	6215	#if X_BYTE_ORDER == X_BIG_ENDIAN
Lines 6568-6576 static Bool RADEONModeInit(ScrnInfoPtr p Link Here
6568	if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;	6542	if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
6569		6543
6570	pScrn->vtSema = TRUE;	6544	pScrn->vtSema = TRUE;
6571	RADEONBlank(pScrn);	6545	RADEONBlank(pScrn, TRUE);
6572	RADEONRestoreMode(pScrn, &info->ModeReg);	6546	RADEONRestoreMode(pScrn, &info->ModeReg);
6573	RADEONUnblank(pScrn);	6547	RADEONBlank(pScrn, FALSE);
6574		6548
6575	info->CurrentLayout.mode = mode;	6549	info->CurrentLayout.mode = mode;
6576		6550
Lines 6592-6599 static Bool RADEONSaveScreen(ScreenPtr p Link Here
6592	if (unblank) SetTimeSinceLastInputEvent();	6566	if (unblank) SetTimeSinceLastInputEvent();
6593		6567
6594	if ((pScrn != NULL) && pScrn->vtSema) {	6568	if ((pScrn != NULL) && pScrn->vtSema) {
6595	if (unblank) RADEONUnblank(pScrn);	6569	if (unblank)
6596	else RADEONBlank(pScrn);	6570	RADEONBlank(pScrn, FALSE);
		6571	else
		6572	RADEONBlank(pScrn, TRUE);
6597	}	6573	}
6598	return TRUE;	6574	return TRUE;
6599	}	6575	}
Lines 7152-7158 static void Link Here
7152	RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)	7128	RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)
7153	{	7129	{
7154	RADEONInfoPtr info = RADEONPTR(pScrn);	7130	RADEONInfoPtr info = RADEONPTR(pScrn);
7155	RADEONConnector *connector;	7131	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
7156	char *strptr;	7132	char *strptr;
7157	char *default_hsync = "28-33";	7133	char *default_hsync = "28-33";
7158	char *default_vrefresh = "43-72";	7134	char *default_vrefresh = "43-72";
Lines 7182-7193 RADEONGetMergedFBOptions(ScrnInfoPtr pSc Link Here
7182	info->MergedFB = FALSE;	7158	info->MergedFB = FALSE;
7183	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,	7159	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
7184	"Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");	7160	"Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");
7185	} else if ((connector = RADEONGetCrtcConnector(pScrn, 2))) {	7161	} else if (!pRADEONEnt->PortInfo[1]->MonInfo) {
7186	if (!connector->MonInfo) {	7162	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
7187	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,	7163	"Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");
7188	"Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");	7164	default_range = TRUE;
7189	default_range = TRUE;
7190	}
7191	}	7165	}
7192		7166
7193	if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {	7167	if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {
Lines 7352-7359 RADEONGetMergedFBOptions(ScrnInfoPtr pSc Link Here
7352		7326
7353	/* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */	7327	/* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */
7354		7328
7355	connector = RADEONGetCrtcConnector(pScrn, 2);	7329	info->CRT2pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
7356	info->CRT2pScrn->monitor->DDC = connector ? connector->MonInfo : NULL;
7357		7330
7358	if (default_range) {	7331	if (default_range) {
7359	RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);	7332	RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);

Lines 904-917 extern void RADEONEnableDisplay(S Link Here

(-)a/src/radeon.h (-3 / +1 lines)
904	extern void RADEONDisableDisplays(ScrnInfoPtr pScrn);	904	extern void RADEONDisableDisplays(ScrnInfoPtr pScrn);
905	extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);	905	extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);
906	extern void RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);	906	extern void RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);
907	extern void RADEONUnblank(ScrnInfoPtr pScrn);	907	extern void RADEONBlank(ScrnInfoPtr pScrn, Bool Blank);
908	extern void RADEONBlank(ScrnInfoPtr pScrn);
909	extern void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,	908	extern void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
910	int PowerManagementMode,	909	int PowerManagementMode,
911	int flags);	910	int flags);
912	extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);	911	extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);
913	extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);	912	extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
914	extern RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num);
915	extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);	913	extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
916	extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,	914	extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
917	RADEONMonitorType DisplayType, int crtc2);	915	RADEONMonitorType DisplayType, int crtc2);