Attachment #151456 for bug #264720

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extern void        RADEONDisableDisplays(ScrnInfoPtr pScrn);
extern void        RADEONGetPanelInfo(ScrnInfoPtr pScrn);
extern void        RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);
extern void        RADEONBlank(ScrnInfoPtr pScrn, Bool Blank);
extern void        RADEONBlank(ScrnInfoPtr pScrn);
extern void        RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
						   int PowerManagementMode,
						   int flags);
extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);
extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
extern RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num);
extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
				  RADEONMonitorType DisplayType, int crtc2);




    }
}

static void
RADEONConnectorReverse(RADEONEntPtr pRADEONEnt)
{
    RADEONConnector *connector;

    connector = pRADEONEnt->PortInfo[0];
    pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
    pRADEONEnt->PortInfo[1] = connector;
}

/*
 * initialise the static data sos we don't have to re-do at randr change */
void RADEONSetupConnectors(ScrnInfoPtr pScrn)

    }

    /* always make TMDS_INT port first*/
    if (pRADEONEnt->PortInfo[1]->TMDSType == TMDS_INT)
	RADEONConnectorReverse(pRADEONEnt);
    else if ((pRADEONEnt->PortInfo[0]->TMDSType != TMDS_INT &&
        pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
        pRADEONEnt->PortInfo[1] = connector;
    } else if ((pRADEONEnt->PortInfo[0]->TMDSType != TMDS_INT &&
                pRADEONEnt->PortInfo[1]->TMDSType != TMDS_INT)) {
        /* no TMDS_INT port, make primary DAC port first */
	/* On my Inspiron 8600 both internal and external ports are

	   swap when the first port is not DAC_PRIMARY */
        if ((!(pRADEONEnt->PortInfo[0]->ConnectorType == CONNECTOR_PROPRIETARY)) &&  (pRADEONEnt->PortInfo[1]->DACType == DAC_PRIMARY) &&
	     (pRADEONEnt->PortInfo[0]->DACType != DAC_PRIMARY)) {
	    RADEONConnectorReverse(pRADEONEnt);
            connector = pRADEONEnt->PortInfo[0];
            pRADEONEnt->PortInfo[0] = pRADEONEnt->PortInfo[1];
            pRADEONEnt->PortInfo[1] = connector;
        }
    }


	    pRADEONEnt->PortInfo[1]->DACType = DAC_UNKNOWN;
	    pRADEONEnt->PortInfo[1]->TMDSType = TMDS_UNKNOWN;
	    pRADEONEnt->PortInfo[1]->ConnectorType = CONNECTOR_NONE;

	    pRADEONEnt->PortInfo[0]->crtc_num = 1;
	    pRADEONEnt->PortInfo[1]->crtc_num = 2;
	    
	    return;
	}
	

    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    Bool head_reversed = FALSE;
    RADEONConnector *connector;

    info->MergeType = MT_NONE;

    if (!info->IsSecondary) {
      RADEONQueryConnectedDisplays(pScrn);

      pRADEONEnt->PortInfo[0]->crtc_num = 1;
      pRADEONEnt->PortInfo[1]->crtc_num = 2;

      xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
		 "Port1:\n Monitor   -- %s\n Connector -- %s\n DAC Type  -- %s\n TMDS Type -- %s\n DDC Type  -- %s\n", 
		 MonTypeName[pRADEONEnt->PortInfo[0]->MonType+1], 

	if (pRADEONEnt->PortInfo[0]->MonType == MT_NONE) {
	    if (pRADEONEnt->PortInfo[1]->MonType != MT_NONE) {
		/* Only one detected on secondary, let it to be primary */
		if (!head_reversed)
		    RADEONConnectorReverse(pRADEONEnt);
		head_reversed = TRUE;
	    } else {
		/* None detected, Default to a CRT connected */

	    (pRADEONEnt->PortInfo[1]->MonType == MT_CRT)) {
	    if (!(INREG(RADEON_LVDS_GEN_CNTL) & RADEON_LVDS_ON)) {
		/* LCD is switched off, don't turn it on, otherwise it may casue lockup due to SS issue. */
		if (!head_reversed)
		    RADEONConnectorReverse(pRADEONEnt);
		pRADEONEnt->PortInfo[0]->MonType = MT_NONE;
		head_reversed = TRUE;
		pRADEONEnt->PortInfo[0]->MonType = MT_NONE;
		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "LCD is switched off, only CRT will be used\n");
	    }
	}

		    */
		    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Reverse Display cannot be used for mobility chip\n");
		} else {
		    if (!head_reversed)
			RADEONConnectorReverse(pRADEONEnt);
		    head_reversed = TRUE;
		    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Primary and Secondary mapping is reversed\n");
		}


    if(pRADEONEnt->HasCRTC2) {
	if(info->IsSecondary) {
	    connector = RADEONGetCrtcConnector(pScrn, 2);
  	    pRADEONEnt->Controller[1]->binding = 2;
	    info->DisplayType = pRADEONEnt->PortInfo[1]->MonType;
	    pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
		pScrn->monitor->DDC = connector->MonInfo;
	    }
	} else {
	    connector = RADEONGetCrtcConnector(pScrn, 1);
  	    pRADEONEnt->Controller[0]->binding = 1;
	    info->DisplayType = pRADEONEnt->PortInfo[0]->MonType;
	    pScrn->monitor->DDC = pRADEONEnt->PortInfo[0]->MonInfo;
		pScrn->monitor->DDC = connector->MonInfo;
	    }
	}

	if(!pRADEONEnt->HasSecondary) {
	    info->MergeType = pRADEONEnt->PortInfo[1]->MonType;
	    if (connector)
		info->MergeType = connector->MonType;
	    if (info->MergeType)
  	    	pRADEONEnt->Controller[1]->binding = 1;
	}
    } else {
	if (pRADEONEnt->PortInfo[0]->MonType == MT_NONE)
	    pRADEONEnt->PortInfo[0]->MonType = MT_CRT;
	info->DisplayType = pRADEONEnt->PortInfo[0]->MonType;
	pScrn->monitor->DDC = pRADEONEnt->PortInfo[0]->MonInfo;

	pRADEONEnt->PortInfo[1]->MonType = MT_NONE;
	}
	connector = RADEONGetCrtcConnector(pScrn, 2);
	if (connector)
	    connector->MonType = MT_NONE;
	pRADEONEnt->Controller[1]->binding = 1;
    }

    if (!info->IsSecondary) {
	connector = RADEONGetCrtcConnector(pScrn, 2);
        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Primary Head:   Port%d ---- \n", head_reversed?2:1);
	if (pRADEONEnt->PortInfo[1]->MonType != MT_NONE)
            xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Port%d ----\n", head_reversed?1:2);
 	else
            xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Not used ----\n");

    RADEONInitDispBandwidth2(pScrn, info, info2, mode1, mode2);
}

static void
RADEONOutputsBlank(ScrnInfoPtr pScrn, RADEONConnector *pPort, Bool Blank)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;

    switch(pPort->MonType) {
    case MT_LCD:
	if (Blank)
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_DISPLAY_DIS, ~RADEON_LVDS_DISPLAY_DIS);
	else
	    OUTREGP(RADEON_LVDS_GEN_CNTL, 0, ~RADEON_LVDS_DISPLAY_DIS);
        break;

    case MT_CRT:
	if ((info->ChipFamily == CHIP_FAMILY_R200) && (pPort->DACType == DAC_TVDAC)) {
	    if (Blank)
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
	    else
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
	}
        break;
    case MT_DFP:
	if (pPort->TMDSType == TMDS_EXT) {
	    if (Blank)
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
	    else
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
	} else {
	    if (Blank)
		OUTREGP(RADEON_FP_GEN_CNTL, RADEON_FP_BLANK_EN, ~RADEON_FP_BLANK_EN);
	    else
		OUTREGP(RADEON_FP_GEN_CNTL, 0, ~RADEON_FP_BLANK_EN);
	}
        break;
    case MT_NONE:
    default:
        break;
    }
}
 
static void
RADEONCRTC1Blank(RADEONInfoPtr info, Bool Blank)
{
    unsigned char *RADEONMMIO = info->MMIO;
    
    if (Blank)
	OUTREGP(RADEON_CRTC_EXT_CNTL,
		RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS,
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS));
    else
	OUTREGP(RADEON_CRTC_EXT_CNTL, 0,
		~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS));
}

static void
RADEONCRTC2Blank(RADEONInfoPtr info, Bool Blank)
{
    unsigned char *RADEONMMIO = info->MMIO;
    
    if (Blank)
	OUTREGP(RADEON_CRTC2_GEN_CNTL,
		RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS,
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
    else
	OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
}

/* Blank screen */
void RADEONBlank(ScrnInfoPtr pScrn, Bool Blank)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    RADEONConnector *pPort;

    if (!pRADEONEnt->HasSecondary ||
	(pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && (!info->IsSecondary))) {
 
	RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[0], Blank);
	RADEONCRTC1Blank(info, Blank);
 
	if (!pRADEONEnt->HasCRTC2)
	    return;
		 RADEON_CRTC_HSYNC_DIS,
		 ~(RADEON_CRTC_DISPLAY_DIS |
		   RADEON_CRTC_VSYNC_DIS | 
		   RADEON_CRTC_HSYNC_DIS));

	if (!pRADEONEnt->HasCRTC2) return;

	if (pRADEONEnt->Controller[1]->binding == 1) {
	    RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[1], Blank);
	    RADEONCRTC2Blank(info, Blank);
		RADEONBlankSet(pScrn, pPort);
	    OUTREGP (RADEON_CRTC2_GEN_CNTL,
		     RADEON_CRTC2_DISP_DIS |
		     RADEON_CRTC2_VSYNC_DIS |
		     RADEON_CRTC2_HSYNC_DIS,
		     ~(RADEON_CRTC2_DISP_DIS |
		       RADEON_CRTC2_VSYNC_DIS | 
		       RADEON_CRTC2_HSYNC_DIS));
	}
    }

    if ((pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && info->IsSecondary)) {
	RADEONOutputsBlank(pScrn, pRADEONEnt->PortInfo[1], Blank);
	RADEONCRTC2Blank(info, Blank);
	    RADEONBlankSet(pScrn, pPort);
	OUTREGP (RADEON_CRTC2_GEN_CNTL,
		 RADEON_CRTC2_DISP_DIS |
		 RADEON_CRTC2_VSYNC_DIS |
		 RADEON_CRTC2_HSYNC_DIS,
		 ~(RADEON_CRTC2_DISP_DIS |
		   RADEON_CRTC2_VSYNC_DIS | 
		   RADEON_CRTC2_HSYNC_DIS));
    }
}


static void
RADEONOutputsDPMS(ScrnInfoPtr pScrn, RADEONConnector *pPort, int Mode)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;

    RADEONMonitorType MonType;
    RADEONTmdsType TmdsType;
    RADEONDacType DacType;
  
    MonType = pPort->MonType;
    TmdsType = pPort->TMDSType;
    DacType = pPort->DACType;
    
    switch (MonType) {
    case MT_LCD:
	if (Mode == DPMSModeOn) {
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_BLON, ~RADEON_LVDS_BLON);
	    usleep (info->PanelPwrDly * 1000);
	    OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_ON, ~RADEON_LVDS_ON);
	} else {
	    unsigned int tmpPixclksCntl = INPLL(pScrn, RADEON_PIXCLKS_CNTL);
	    
	    /* Asic bug, when turning off LVDS_ON, we have to make sure
	       RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off */
	    if (info->IsMobility || info->IsIGP)
		OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
	    OUTREGP(RADEON_LVDS_GEN_CNTL, 0, ~(RADEON_LVDS_BLON | RADEON_LVDS_ON));
	    if (info->IsMobility || info->IsIGP)
		OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmpPixclksCntl);
	}
	break;
    case MT_DFP:
	if (Mode == DPMSModeOn) {
	    if (TmdsType == TMDS_EXT) {
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);
		if (info->ChipFamily >= CHIP_FAMILY_R200)
		    OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_DVO_EN, ~RADEON_FP2_DVO_EN);
	    } else
		OUTREGP(RADEON_FP_GEN_CNTL, (RADEON_FP_FPON | RADEON_FP_TMDS_EN),
			~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
	} else {
	    if (TmdsType == TMDS_EXT) {
		OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
		OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);
		if (info->ChipFamily >= CHIP_FAMILY_R200) {
		    OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DVO_EN);
		}
	    } else
		OUTREGP(RADEON_FP_GEN_CNTL, 0, ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
	}
	break;
    case MT_CRT:
    default:
	RADEONDacPowerSet(pScrn, (Mode == DPMSModeOn), (DacType == DAC_PRIMARY));
	break;
    }
}

void
RADEONCRTC1DPMS(RADEONInfoPtr info, int Mode)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    RADEONConnector *pPort;

    if (!pRADEONEnt->HasSecondary ||
	(pRADEONEnt->HasSecondary && !info->IsSwitching) ||
	(info->IsSwitching && (!info->IsSecondary))) {
	pPort = RADEONGetCrtcConnector(pScrn, 1);
	if (pPort)
	    RADEONUnblankSet(pScrn, pPort);
      OUTREGP(RADEON_CRTC_EXT_CNTL,
	      0,
	      ~(RADEON_CRTC_DISPLAY_DIS |
		RADEON_CRTC_VSYNC_DIS |
		RADEON_CRTC_HSYNC_DIS));

      if (!pRADEONEnt->HasCRTC2) return;

      if (pRADEONEnt->Controller[1]->binding == 1) {
	pPort = RADEONGetCrtcConnector(pScrn, 2);
	if (pPort)
	    RADEONUnblankSet(pScrn, pPort);
	OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		~(RADEON_CRTC2_DISP_DIS |
		  RADEON_CRTC2_VSYNC_DIS |
		  RADEON_CRTC2_HSYNC_DIS));
      }
    }

    switch (Mode) {
	case DPMSModeOn:
	    /* Screen: On; HSync: On, VSync: On */
	    OUTREGP(RADEON_CRTC_EXT_CNTL, 0,
		    ~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	    break;
	case DPMSModeStandby:
	    /* Screen: Off; HSync: Off, VSync: On */
	    OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS),
		    ~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	    break;
	case DPMSModeSuspend:
	    /* Screen: Off; HSync: On, VSync: Off */
	    OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS),
		    ~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	    break;
	case DPMSModeOff:
	default:
	    /* Screen: Off; HSync: Off, VSync: Off */
	    OUTREGP(RADEON_CRTC_EXT_CNTL,
		    (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS),
		    ~(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS));
	    break;
    }
}

void
RADEONCRTC2DPMS(RADEONInfoPtr info, int Mode)
  RADEONInfoPtr  info       = RADEONPTR(pScrn);
  unsigned char *RADEONMMIO = info->MMIO;
  RADEONMonitorType MonType;
  RADEONTmdsType TmdsType;
  RADEONDacType DacType;

  MonType = pPort->MonType;
  TmdsType = pPort->TMDSType;
  DacType = pPort->DACType;

  switch(MonType) {
  case MT_LCD:
    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_BLON, ~RADEON_LVDS_BLON);
    usleep (info->PanelPwrDly * 1000);
    OUTREGP (RADEON_LVDS_GEN_CNTL, RADEON_LVDS_ON, ~RADEON_LVDS_ON);
    break;
  case MT_DFP:
    if (TmdsType == TMDS_EXT) {
      OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
      OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_ON, ~RADEON_FP2_ON);
      if (info->ChipFamily >= CHIP_FAMILY_R200) {
	OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_DVO_EN, 
		 ~RADEON_FP2_DVO_EN);
      }
    } else
      OUTREGP (RADEON_FP_GEN_CNTL, (RADEON_FP_FPON | RADEON_FP_TMDS_EN),
	       ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
    break;
  case MT_CRT:
  default:
    RADEONDacPowerSet(pScrn, TRUE, (DacType == DAC_PRIMARY));
    break;
  }
}

static void RADEONDPMSSetOff(ScrnInfoPtr pScrn, RADEONConnector *pPort)
{
    unsigned char *RADEONMMIO = info->MMIO;
    
    switch (Mode) {
	case DPMSModeOn:
	    /* Screen: On; HSync: On, VSync: On */
	    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
		    ~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	    break;
	case DPMSModeStandby:
	    /* Screen: Off; HSync: Off, VSync: On */
	    OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
		    ~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	    break;
	case DPMSModeSuspend:
	    /* Screen: Off; HSync: On, VSync: Off */
	    OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
		    ~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	    break;
	case DPMSModeOff:
	default:
	    /* Screen: Off; HSync: Off, VSync: Off */
	    OUTREGP(RADEON_CRTC2_GEN_CNTL,
		    (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS),
		    ~(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS));
	    break;
	    
    }
    break;
  case MT_DFP:
    if (TmdsType == TMDS_EXT) {
      OUTREGP (RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
      OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_ON);
      if (info->ChipFamily >= CHIP_FAMILY_R200) {
	OUTREGP (RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_DVO_EN);
      }
    } else
      OUTREGP (RADEON_FP_GEN_CNTL, 0, ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN));
    break;
  case MT_CRT:
  default:
    RADEONDacPowerSet(pScrn, FALSE, (DacType == DAC_PRIMARY));
    break;
  }
}


/* Sets VESA Display Power Management Signaling (DPMS) Mode */
void
RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
					    int flags)
{
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
    RADEONEntPtr pRADEONEnt   = RADEONEntPriv(pScrn);
    unsigned char *RADEONMMIO = info->MMIO;
    RADEONConnector *pPort;

    if (!pScrn->vtSema)
	return;

    RADEONTRACE(("RADEONDisplayPowerManagementSet(%d,0x%x)\n", PowerManagementMode, flags));

#ifdef XF86DRI
    if (info->CPStarted)
	DRILock(pScrn->pScreen, 0);
#endif

    if (info->accelOn)

    if (info->FBDev) {
	fbdevHWDPMSSet(pScrn, PowerManagementMode, flags);
    } else {
	if (info->IsSecondary) {
	    RADEONCRTC2DPMS(info, PowerManagementMode);
	    RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[1], PowerManagementMode);
	} else {
	    RADEONCRTC1DPMS(info, PowerManagementMode);
	    RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[0], PowerManagementMode);

	switch (PowerManagementMode) {
	case DPMSModeOn:
	    /* Screen: On; HSync: On, VSync: On */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);
	    }
	    break;

	case DPMSModeStandby:
	    /* Screen: Off; HSync: Off, VSync: On */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL,
			(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
			~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
			    (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
			    ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL,
			(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS),
			~mask1);
	    }
	    break;

	case DPMSModeSuspend:
	    /* Screen: Off; HSync: On, VSync: Off */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL,
			(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
			~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
			    (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
			    ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL,
			(RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS),
			~mask1);
	    }
	    break;

	case DPMSModeOff:
	    /* Screen: Off; HSync: Off, VSync: Off */
	    if (info->IsSecondary)
		OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
	    else {
		if (pRADEONEnt->Controller[1]->binding == 1)
		    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
		OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);
	    }
	    break;
	}

	if (PowerManagementMode == DPMSModeOn) {
  	    pPort = RADEONGetCrtcConnector(pScrn, info->IsSecondary ? 2 : 1);
   	    RADEONDPMSSetOn(pScrn, pPort);
	    if (pRADEONEnt->Controller[1]->binding == 1) {
		RADEONCRTC2DPMS(info, PowerManagementMode);
		RADEONOutputsDPMS(pScrn, pRADEONEnt->PortInfo[1], PowerManagementMode);
	    }
	}
		   (PowerManagementMode == DPMSModeSuspend) ||
		   (PowerManagementMode == DPMSModeStandby)) {
	    pPort = RADEONGetCrtcConnector(pScrn, info->IsSecondary ? 2 : 1);
	    RADEONDPMSSetOff(pScrn, pPort);
	    if (pRADEONEnt->Controller[1]->binding == 1) {
	        pPort = RADEONGetCrtcConnector(pScrn, 2);	        
	        RADEONDPMSSetOff(pScrn, pPort);
	    }
        }
    }

#ifdef XF86DRI
    if (info->CPStarted)
	DRIUnlock(pScrn->pScreen);
#endif
}


Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    int i;

    if (pRADEONEnt->PortInfo[0])
        return TRUE;

    /* for now always allocate both connectors */
    pRADEONEnt->PortInfo[0] = xcalloc(sizeof(RADEONConnector), 1);
    if (!pRADEONEnt->PortInfo[0])
	return FALSE;

    pRADEONEnt->PortInfo[1] = xcalloc(sizeof(RADEONConnector), 1);
    if (!pRADEONEnt->PortInfo[1]) {
	xfree(pRADEONEnt->PortInfo[0]);
	return FALSE;
    }

    return TRUE;
}

RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);

    if (pRADEONEnt->PortInfo[0]->crtc_num == crtc_num)
      return pRADEONEnt->PortInfo[0];
    else if (pRADEONEnt->PortInfo[1]->crtc_num == crtc_num)
      return pRADEONEnt->PortInfo[1];
    return NULL;
}




	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);

    /* don't use RMX if we have a dual-tmds panels */
    if (pRADEONEnt->PortInfo[1]->MonType == MT_DFP)
	info->ddc_mode = TRUE;
	    info->ddc_mode = TRUE;
    /* don't use RMX if we are Dell Server */  
    if (info->IsDellServer)
	info->ddc_mode = TRUE;

	    RADEONRestoreCrtc2Registers(pScrn, restore);
	    RADEONRestorePLL2Registers(pScrn, restore);
	    RADEONRestoreFPRegisters(pScrn, restore);
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
	    pCRTC2->IsActive = TRUE;
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC2->IsActive = TRUE;
	    }
	} else {
	    RADEONRestoreMemMapRegisters(pScrn, restore);
	    RADEONRestoreCommonRegisters(pScrn, restore);

            RADEONRestoreCrtcRegisters(pScrn, restore);
            RADEONRestorePLLRegisters(pScrn, restore);
	    RADEONRestoreFPRegisters(pScrn, restore);
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
	    pCRTC1->IsActive = TRUE;
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC1->IsActive = TRUE;
	    }
	    if (pCRTC2->binding == 1) {
		RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
		pCRTC2->IsActive = TRUE;
		    RADEONEnableDisplay(pScrn, pPort, TRUE);
		    pCRTC2->IsActive = TRUE;
		}
	    }
	}
    } else {

	RADEONRestoreCrtcRegisters(pScrn, restore);
	RADEONRestorePLLRegisters(pScrn, restore);
	RADEONRestoreFPRegisters(pScrn, restore);
	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
	pCRTC1->IsActive = TRUE;
	if (pCRTC2->binding == 1) {
	    RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
	    pCRTC2->IsActive = TRUE;
	if ((pCRTC2->binding == 1) || pRADEONEnt->HasSecondary) {
	    pPort = RADEONGetCrtcConnector(pScrn, 2);
	    if (pPort) {
		RADEONEnableDisplay(pScrn, pPort, TRUE);
		pCRTC2->IsActive = TRUE;
	    }
	}
    }


	fbdevHWRestore(pScrn);
	return;
    }
    RADEONBlank(pScrn, TRUE);

    OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
    RADEONPllErrataAfterIndex(info);

    }
}

static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, Bool IsPrimary)
{
    Bool IsPrimary = crtc_num == 1 ? TRUE : FALSE;

    if (pPort->MonType == MT_CRT) {
	if (pPort->DACType == DAC_PRIMARY) {
	    RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);

	    RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);
	}
    } else if (pPort->MonType == MT_LCD) {
	if (IsPrimary)
	    RADEONInitRMXRegisters(pScrn, save, mode);
	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);
    } else if (pPort->MonType == MT_DFP) {
	if (IsPrimary)
	    RADEONInitRMXRegisters(pScrn, save, mode);
	if (pPort->TMDSType == TMDS_INT) {
	    RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);

    }

    /* get the output connected to this CRTC */
    RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], TRUE);
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 1);
    } else if (pRADEONEnt->PortInfo[1]->crtc_num == 1) {
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 1);
    }

    if (info->IsDellServer) {
	save->dac2_cntl = info->SavedReg.dac2_cntl;

    save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;

    /* get the output connected to this CRTC */
    RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], FALSE);
    
    } else if (pRADEONEnt->PortInfo[1]->crtc_num == 2) {
	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 2);
    }

    /* We must set SURFACE_CNTL properly on the second screen too */
    save->surface_cntl = 0;
#if X_BYTE_ORDER == X_BIG_ENDIAN

    if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;

    pScrn->vtSema = TRUE;
    RADEONBlank(pScrn, TRUE);
    RADEONRestoreMode(pScrn, &info->ModeReg);
    RADEONBlank(pScrn, FALSE);

    info->CurrentLayout.mode = mode;


    if (unblank) SetTimeSinceLastInputEvent();

    if ((pScrn != NULL) && pScrn->vtSema) {
	if (unblank)
	    RADEONBlank(pScrn, FALSE);
	else
	    RADEONBlank(pScrn, TRUE);
    }
    return TRUE;
}

RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)
{
    RADEONInfoPtr      info       = RADEONPTR(pScrn);
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    char        *strptr;
    char	*default_hsync = "28-33";
    char	*default_vrefresh = "43-72";

	info->MergedFB = FALSE;
        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
        "Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");
    } else if (!pRADEONEnt->PortInfo[1]->MonInfo) {
	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
		   "Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");
	default_range = TRUE;
	    default_range = TRUE;
	}
    }

    if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {


	  /* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */

	  info->CRT2pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
	  info->CRT2pScrn->monitor->DDC = connector ? connector->MonInfo : NULL;

          if (default_range) {
             RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);

Lines 119-127 typedef struct Link Here

(-)../xf86-video-ati-6.6.192.orig/src/radeon_probe.h (-3 lines)
119	RADEONConnectorType ConnectorType;	119	RADEONConnectorType ConnectorType;
120	RADEONMonitorType MonType;	120	RADEONMonitorType MonType;
121	xf86MonPtr MonInfo;	121	xf86MonPtr MonInfo;
122
123	/* one connector can be bound to one CRTC */
124	int crtc_num;
125	} RADEONConnector;	122	} RADEONConnector;
126		123
127		124

Return to bug 264720

Lines 2029-2037 static Bool RADEONPreInitModes(ScrnInfoP Link Here

(-)../xf86-video-ati-6.6.192.orig/src/radeon_driver.c (-59 / +32 lines)
2029	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);	2029	xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);
2030		2030
2031	/* don't use RMX if we have a dual-tmds panels */	2031	/* don't use RMX if we have a dual-tmds panels */
2032	if ((connector = RADEONGetCrtcConnector(pScrn, 2)))	2032	if (pRADEONEnt->PortInfo[1]->MonType == MT_DFP)
2033	if (connector->MonType == MT_DFP)	2033	info->ddc_mode = TRUE;
2034	info->ddc_mode = TRUE;
2035	/* don't use RMX if we are Dell Server */	2034	/* don't use RMX if we are Dell Server */
2036	if (info->IsDellServer)	2035	if (info->IsDellServer)
2037	info->ddc_mode = TRUE;	2036	info->ddc_mode = TRUE;
Lines 5129-5139 static void RADEONRestoreMode(ScrnInfoPt Link Here
5129	RADEONRestoreCrtc2Registers(pScrn, restore);	5128	RADEONRestoreCrtc2Registers(pScrn, restore);
5130	RADEONRestorePLL2Registers(pScrn, restore);	5129	RADEONRestorePLL2Registers(pScrn, restore);
5131	RADEONRestoreFPRegisters(pScrn, restore);	5130	RADEONRestoreFPRegisters(pScrn, restore);
5132	pPort = RADEONGetCrtcConnector(pScrn, 2);	5131	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5133	if (pPort) {	5132	pCRTC2->IsActive = TRUE;
5134	RADEONEnableDisplay(pScrn, pPort, TRUE);
5135	pCRTC2->IsActive = TRUE;
5136	}
5137	} else {	5133	} else {
5138	RADEONRestoreMemMapRegisters(pScrn, restore);	5134	RADEONRestoreMemMapRegisters(pScrn, restore);
5139	RADEONRestoreCommonRegisters(pScrn, restore);	5135	RADEONRestoreCommonRegisters(pScrn, restore);
Lines 5145-5161 static void RADEONRestoreMode(ScrnInfoPt Link Here
5145	RADEONRestoreCrtcRegisters(pScrn, restore);	5141	RADEONRestoreCrtcRegisters(pScrn, restore);
5146	RADEONRestorePLLRegisters(pScrn, restore);	5142	RADEONRestorePLLRegisters(pScrn, restore);
5147	RADEONRestoreFPRegisters(pScrn, restore);	5143	RADEONRestoreFPRegisters(pScrn, restore);
5148	pPort = RADEONGetCrtcConnector(pScrn, 1);	5144	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
5149	if (pPort) {	5145	pCRTC1->IsActive = TRUE;
5150	RADEONEnableDisplay(pScrn, pPort, TRUE);
5151	pCRTC1->IsActive = TRUE;
5152	}
5153	if (pCRTC2->binding == 1) {	5146	if (pCRTC2->binding == 1) {
5154	pPort = RADEONGetCrtcConnector(pScrn, 2);	5147	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5155	if (pPort) {	5148	pCRTC2->IsActive = TRUE;
5156	RADEONEnableDisplay(pScrn, pPort, TRUE);
5157	pCRTC2->IsActive = TRUE;
5158	}
5159	}	5149	}
5160	}	5150	}
5161	} else {	5151	} else {
Lines 5169-5185 static void RADEONRestoreMode(ScrnInfoPt Link Here
5169	RADEONRestoreCrtcRegisters(pScrn, restore);	5159	RADEONRestoreCrtcRegisters(pScrn, restore);
5170	RADEONRestorePLLRegisters(pScrn, restore);	5160	RADEONRestorePLLRegisters(pScrn, restore);
5171	RADEONRestoreFPRegisters(pScrn, restore);	5161	RADEONRestoreFPRegisters(pScrn, restore);
5172	pPort = RADEONGetCrtcConnector(pScrn, 1);	5162	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[0], TRUE);
5173	if (pPort) {	5163	pCRTC1->IsActive = TRUE;
5174	RADEONEnableDisplay(pScrn, pPort, TRUE);	5164	if (pCRTC2->binding == 1) {
5175	pCRTC1->IsActive = TRUE;	5165	RADEONEnableDisplay(pScrn, pRADEONEnt->PortInfo[1], TRUE);
5176	}	5166	pCRTC2->IsActive = TRUE;
5177	if ((pCRTC2->binding == 1) \|\| pRADEONEnt->HasSecondary) {
5178	pPort = RADEONGetCrtcConnector(pScrn, 2);
5179	if (pPort) {
5180	RADEONEnableDisplay(pScrn, pPort, TRUE);
5181	pCRTC2->IsActive = TRUE;
5182	}
5183	}	5167	}
5184	}	5168	}
5185		5169
Lines 5475-5481 static void RADEONRestore(ScrnInfoPtr pS Link Here
5475	fbdevHWRestore(pScrn);	5459	fbdevHWRestore(pScrn);
5476	return;	5460	return;
5477	}	5461	}
5478	RADEONBlank(pScrn);	5462	RADEONBlank(pScrn, TRUE);
5479		5463
5480	OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);	5464	OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
5481	RADEONPllErrataAfterIndex(info);	5465	RADEONPllErrataAfterIndex(info);
Lines 5847-5856 static void RADEONInitDAC2Registers(Scrn Link Here
5847	}	5831	}
5848	}	5832	}
5849		5833
5850	static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, int crtc_num)	5834	static void RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONConnector *pPort, Bool IsPrimary)
5851	{	5835	{
5852	Bool IsPrimary = crtc_num == 1 ? TRUE : FALSE;
5853
5854	if (pPort->MonType == MT_CRT) {	5836	if (pPort->MonType == MT_CRT) {
5855	if (pPort->DACType == DAC_PRIMARY) {	5837	if (pPort->DACType == DAC_PRIMARY) {
5856	RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);	5838	RADEONInitDACRegisters(pScrn, save, mode, IsPrimary);
Lines 5858-5868 static void RADEONInitOutputRegisters(Sc Link Here
5858	RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);	5840	RADEONInitDAC2Registers(pScrn, save, mode, IsPrimary);
5859	}	5841	}
5860	} else if (pPort->MonType == MT_LCD) {	5842	} else if (pPort->MonType == MT_LCD) {
5861	if (crtc_num == 1)	5843	if (IsPrimary)
5862	RADEONInitRMXRegisters(pScrn, save, mode);	5844	RADEONInitRMXRegisters(pScrn, save, mode);
5863	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);	5845	RADEONInitLVDSRegisters(pScrn, save, mode, IsPrimary);
5864	} else if (pPort->MonType == MT_DFP) {	5846	} else if (pPort->MonType == MT_DFP) {
5865	if (crtc_num == 1)	5847	if (IsPrimary)
5866	RADEONInitRMXRegisters(pScrn, save, mode);	5848	RADEONInitRMXRegisters(pScrn, save, mode);
5867	if (pPort->TMDSType == TMDS_INT) {	5849	if (pPort->TMDSType == TMDS_INT) {
5868	RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);	5850	RADEONInitFPRegisters(pScrn, save, mode, IsPrimary);
Lines 6032-6042 static Bool RADEONInitCrtcRegisters(Scrn Link Here
6032	}	6014	}
6033		6015
6034	/* get the output connected to this CRTC */	6016	/* get the output connected to this CRTC */
6035	if (pRADEONEnt->PortInfo[0]->crtc_num == 1) {	6017	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], TRUE);
6036	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 1);
6037	} else if (pRADEONEnt->PortInfo[1]->crtc_num == 1) {
6038	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 1);
6039	}
6040		6018
6041	if (info->IsDellServer) {	6019	if (info->IsDellServer) {
6042	save->dac2_cntl = info->SavedReg.dac2_cntl;	6020	save->dac2_cntl = info->SavedReg.dac2_cntl;
Lines 6167-6178 static Bool RADEONInitCrtc2Registers(Scr Link Here
6167	save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;	6145	save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;
6168		6146
6169	/* get the output connected to this CRTC */	6147	/* get the output connected to this CRTC */
6170	if (pRADEONEnt->PortInfo[0]->crtc_num == 2) {	6148	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], FALSE);
6171	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[0], 2);	6149
6172	} else if (pRADEONEnt->PortInfo[1]->crtc_num == 2) {
6173	RADEONInitOutputRegisters(pScrn, save, mode, pRADEONEnt->PortInfo[1], 2);
6174	}
6175
6176	/* We must set SURFACE_CNTL properly on the second screen too */	6150	/* We must set SURFACE_CNTL properly on the second screen too */
6177	save->surface_cntl = 0;	6151	save->surface_cntl = 0;
6178	#if X_BYTE_ORDER == X_BIG_ENDIAN	6152	#if X_BYTE_ORDER == X_BIG_ENDIAN
Lines 6496-6504 static Bool RADEONModeInit(ScrnInfoPtr p Link Here
6496	if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;	6470	if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
6497		6471
6498	pScrn->vtSema = TRUE;	6472	pScrn->vtSema = TRUE;
6499	RADEONBlank(pScrn);	6473	RADEONBlank(pScrn, TRUE);
6500	RADEONRestoreMode(pScrn, &info->ModeReg);	6474	RADEONRestoreMode(pScrn, &info->ModeReg);
6501	RADEONUnblank(pScrn);	6475	RADEONBlank(pScrn, FALSE);
6502		6476
6503	info->CurrentLayout.mode = mode;	6477	info->CurrentLayout.mode = mode;
6504		6478
Lines 6519-6526 static Bool RADEONSaveScreen(ScreenPtr p Link Here
6519	if (unblank) SetTimeSinceLastInputEvent();	6493	if (unblank) SetTimeSinceLastInputEvent();
6520		6494
6521	if ((pScrn != NULL) && pScrn->vtSema) {	6495	if ((pScrn != NULL) && pScrn->vtSema) {
6522	if (unblank) RADEONUnblank(pScrn);	6496	if (unblank)
6523	else RADEONBlank(pScrn);	6497	RADEONBlank(pScrn, FALSE);
		6498	else
		6499	RADEONBlank(pScrn, TRUE);
6524	}	6500	}
6525	return TRUE;	6501	return TRUE;
6526	}	6502	}
Lines 7065-7071 static void Link Here
7065	RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)	7041	RADEONGetMergedFBOptions(ScrnInfoPtr pScrn)
7066	{	7042	{
7067	RADEONInfoPtr info = RADEONPTR(pScrn);	7043	RADEONInfoPtr info = RADEONPTR(pScrn);
7068	RADEONConnector *connector;	7044	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
7069	char *strptr;	7045	char *strptr;
7070	char *default_hsync = "28-33";	7046	char *default_hsync = "28-33";
7071	char *default_vrefresh = "43-72";	7047	char *default_vrefresh = "43-72";
Lines 7095-7106 RADEONGetMergedFBOptions(ScrnInfoPtr pSc Link Here
7095	info->MergedFB = FALSE;	7071	info->MergedFB = FALSE;
7096	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,	7072	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
7097	"Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");	7073	"Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");
7098	} else if ((connector = RADEONGetCrtcConnector(pScrn, 2))) {	7074	} else if (!pRADEONEnt->PortInfo[1]->MonInfo) {
7099	if (!connector->MonInfo) {	7075	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
7100	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,	7076	"Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");
7101	"Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");	7077	default_range = TRUE;
7102	default_range = TRUE;
7103	}
7104	}	7078	}
7105		7079
7106	if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {	7080	if (xf86GetOptValBool(info->Options, OPTION_MERGEDFB, &val)) {
Lines 7264-7271 RADEONGetMergedFBOptions(ScrnInfoPtr pSc Link Here
7264		7238
7265	/* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */	7239	/* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */
7266		7240
7267	connector = RADEONGetCrtcConnector(pScrn, 2);	7241	info->CRT2pScrn->monitor->DDC = pRADEONEnt->PortInfo[1]->MonInfo;
7268	info->CRT2pScrn->monitor->DDC = connector ? connector->MonInfo : NULL;
7269		7242
7270	if (default_range) {	7243	if (default_range) {
7271	RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);	7244	RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);

Lines 907-920 extern void RADEONEnableDisplay(S Link Here

(-)../xf86-video-ati-6.6.192.orig/src/radeon.h (-3 / +1 lines)
907	extern void RADEONDisableDisplays(ScrnInfoPtr pScrn);	907	extern void RADEONDisableDisplays(ScrnInfoPtr pScrn);
908	extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);	908	extern void RADEONGetPanelInfo(ScrnInfoPtr pScrn);
909	extern void RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);	909	extern void RADEONGetTVDacAdjInfo(ScrnInfoPtr pScrn);
910	extern void RADEONUnblank(ScrnInfoPtr pScrn);	910	extern void RADEONBlank(ScrnInfoPtr pScrn, Bool Blank);
911	extern void RADEONBlank(ScrnInfoPtr pScrn);
912	extern void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,	911	extern void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
913	int PowerManagementMode,	912	int PowerManagementMode,
914	int flags);	913	int flags);
915	extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);	914	extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);
916	extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);	915	extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
917	extern RADEONConnector *RADEONGetCrtcConnector(ScrnInfoPtr pScrn, int crtc_num);
918	extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);	916	extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
919	extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,	917	extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
920	RADEONMonitorType DisplayType, int crtc2);	918	RADEONMonitorType DisplayType, int crtc2);