Attachment 349949 Details for Bug 590242

output of "mdt --modes --show dump"

mdt.dump.txt (text/plain), 137.35 KB, created by Stefan Seyfried on 2010-03-23 08:11:14 UTC

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Filename:

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Creator: Stefan Seyfried

Created: 2010-03-23 08:11:14 UTC

Size: 137.35 KB

patch

obsolete

>=== bios setup ===
>video bios: size 0x10000
>video bios: entry 0xc000:0x2370
>=== running bios
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000000b
>0cf9:  rw in=00000000 out=0000000b
>0cfa:  rw in=00000000 out=0000000b
>0cfb:  rw in=00000000 out=0000000b
>0cfc:  rw in=0000000b out=00000000
>0cfd:  rw in=0000000b out=00000000
>0cfe:  rw in=0000000b out=00000000
>0cff:  rw in=0000000b out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>20fa:  rw in=00000001 out=00000000
>20fb:  rw in=00000001 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000000493 ; tsc
>msr[0011]    00000000000c5512 ; real tsc (previous)
>msr[0012]    00000000000c5a5e ; real tsc, ratio=691.35
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000000 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get info: ok (time 0.001s, eax 0x4f, err = 0x0)
>=== vbe info
>version = 2.0, oem version = 1.0
>memory = 32704k
>oem name [0x08100] = "ATI MOBILITY RADEON 9600   "
>vendor name [0x0811c] = "ATI Technologies Inc."
>product name [0x08132] = "P10 "
>product revision [0x08137] = "01.00"
>60 video modes:
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000063
>0cf9:  rw in=00000000 out=00000063
>0cfa:  rw in=00000000 out=00000063
>0cfb:  rw in=00000000 out=00000063
>0cfc:  rw in=00000063 out=00000000
>0cfd:  rw in=00000063 out=00000000
>0cfe:  rw in=00000063 out=00000000
>0cff:  rw in=00000063 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000023 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000010ca ; tsc
>msr[0011]    000000000027ce82 ; real tsc (previous)
>msr[0012]    000000000027d10a ; real tsc, ratio=607.12
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000182 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0182): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0182[bb]: 320x200+320, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000063
>0cf9:  rw in=00000000 out=00000063
>0cfa:  rw in=00000000 out=00000063
>0cfb:  rw in=00000000 out=00000063
>0cfc:  rw in=00000063 out=00000000
>0cfd:  rw in=00000063 out=00000000
>0cfe:  rw in=00000063 out=00000000
>0cff:  rw in=00000063 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000023 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000010da ; tsc
>msr[0011]    0000000000280d4b ; real tsc (previous)
>msr[0012]    0000000000280fcb ; real tsc, ratio=608.60
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=0000010d edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x010d): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x010d[bb]: 320x200+640, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000063
>0cf9:  rw in=00000000 out=00000063
>0cfa:  rw in=00000000 out=00000063
>0cfb:  rw in=00000000 out=00000063
>0cfc:  rw in=00000063 out=00000000
>0cfd:  rw in=00000063 out=00000000
>0cfe:  rw in=00000063 out=00000000
>0cff:  rw in=00000063 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000023 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000010e6 ; tsc
>msr[0011]    0000000000280c23 ; real tsc (previous)
>msr[0012]    0000000000280ec4 ; real tsc, ratio=606.85
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=0000010e edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x010e): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x010e[bb]: 320x200+640, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000063
>0cf9:  rw in=00000000 out=00000063
>0cfa:  rw in=00000000 out=00000063
>0cfb:  rw in=00000000 out=00000063
>0cfc:  rw in=00000063 out=00000000
>0cfd:  rw in=00000063 out=00000000
>0cfe:  rw in=00000063 out=00000000
>0cff:  rw in=00000063 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000023 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000010f6 ; tsc
>msr[0011]    000000000027f7c0 ; real tsc (previous)
>msr[0012]    000000000027fa4a ; real tsc, ratio=603.40
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=0000010f edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x010f): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x010f[bb]: 320x200+960, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000063
>0cf9:  rw in=00000000 out=00000063
>0cfa:  rw in=00000000 out=00000063
>0cfb:  rw in=00000000 out=00000063
>0cfc:  rw in=00000063 out=00000000
>0cfd:  rw in=00000063 out=00000000
>0cfe:  rw in=00000063 out=00000000
>0cff:  rw in=00000063 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000023 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000010fe ; tsc
>msr[0011]    0000000000288ddd ; real tsc (previous)
>msr[0012]    000000000028905d ; real tsc, ratio=611.13
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000120 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0120): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0120[bb]: 320x200+1280, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000065
>0cf9:  rw in=00000000 out=00000065
>0cfa:  rw in=00000000 out=00000065
>0cfb:  rw in=00000000 out=00000065
>0cfc:  rw in=00000065 out=00000000
>0cfd:  rw in=00000065 out=00000000
>0cfe:  rw in=00000065 out=00000000
>0cff:  rw in=00000065 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000024 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000113e ; tsc
>msr[0011]    00000000005a7957 ; real tsc (previous)
>msr[0012]    00000000005a7d26 ; real tsc, ratio=1343.52
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000192 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0192): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0192[bb]: 320x240+320, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000065
>0cf9:  rw in=00000000 out=00000065
>0cfa:  rw in=00000000 out=00000065
>0cfb:  rw in=00000000 out=00000065
>0cfc:  rw in=00000065 out=00000000
>0cfd:  rw in=00000065 out=00000000
>0cfe:  rw in=00000065 out=00000000
>0cff:  rw in=00000065 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000024 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000114f ; tsc
>msr[0011]    0000000000922db8 ; real tsc (previous)
>msr[0012]    00000000009234d2 ; real tsc, ratio=2162.44
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000193 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0193): ok (time 0.006s, eax 0x4f, err = 0x0)
>  0x0193[bb]: 320x240+640, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000065
>0cf9:  rw in=00000000 out=00000065
>0cfa:  rw in=00000000 out=00000065
>0cfb:  rw in=00000000 out=00000065
>0cfc:  rw in=00000065 out=00000000
>0cfd:  rw in=00000065 out=00000000
>0cfe:  rw in=00000065 out=00000000
>0cff:  rw in=00000065 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000024 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000115b ; tsc
>msr[0011]    000000000044ee91 ; real tsc (previous)
>msr[0012]    000000000044f115 ; real tsc, ratio=1016.92
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000194 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0194): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0194[bb]: 320x240+640, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000065
>0cf9:  rw in=00000000 out=00000065
>0cfa:  rw in=00000000 out=00000065
>0cfb:  rw in=00000000 out=00000065
>0cfc:  rw in=00000065 out=00000000
>0cfd:  rw in=00000065 out=00000000
>0cfe:  rw in=00000065 out=00000000
>0cff:  rw in=00000065 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000024 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000116b ; tsc
>msr[0011]    000000000029ba36 ; real tsc (previous)
>msr[0012]    000000000029bcbb ; real tsc, ratio=613.43
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000195 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0195): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0195[bb]: 320x240+960, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000065
>0cf9:  rw in=00000000 out=00000065
>0cfa:  rw in=00000000 out=00000065
>0cfb:  rw in=00000000 out=00000065
>0cfc:  rw in=00000065 out=00000000
>0cfd:  rw in=00000065 out=00000000
>0cfe:  rw in=00000065 out=00000000
>0cff:  rw in=00000065 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000024 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001173 ; tsc
>msr[0011]    000000000029d0e4 ; real tsc (previous)
>msr[0012]    000000000029d371 ; real tsc, ratio=613.63
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000196 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0196): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0196[bb]: 320x240+1280, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000db
>0cf9:  rw in=00000000 out=000000db
>0cfa:  rw in=00000000 out=000000db
>0cfb:  rw in=00000000 out=000000db
>0cfc:  rw in=000000db out=00000000
>0cfd:  rw in=000000db out=00000000
>0cfe:  rw in=000000db out=00000000
>0cff:  rw in=000000db out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000002393 ; tsc
>msr[0011]    000000000051ad0a ; real tsc (previous)
>msr[0012]    000000000051af96 ; real tsc, ratio=587.83
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001a2 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01a2): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01a2[bb]: 400x300+400, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000db
>0cf9:  rw in=00000000 out=000000db
>0cfa:  rw in=00000000 out=000000db
>0cfb:  rw in=00000000 out=000000db
>0cfc:  rw in=000000db out=00000000
>0cfd:  rw in=000000db out=00000000
>0cfe:  rw in=000000db out=00000000
>0cff:  rw in=000000db out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023a4 ; tsc
>msr[0011]    0000000000690f66 ; real tsc (previous)
>msr[0012]    000000000069132c ; real tsc, ratio=754.73
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001a3 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01a3): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x01a3[bb]: 400x300+800, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000db
>0cf9:  rw in=00000000 out=000000db
>0cfa:  rw in=00000000 out=000000db
>0cfb:  rw in=00000000 out=000000db
>0cfc:  rw in=000000db out=00000000
>0cfd:  rw in=000000db out=00000000
>0cfe:  rw in=000000db out=00000000
>0cff:  rw in=000000db out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023b0 ; tsc
>msr[0011]    000000000069d70c ; real tsc (previous)
>msr[0012]    000000000069da92 ; real tsc, ratio=759.33
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001a4 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01a4): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x01a4[bb]: 400x300+800, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000db
>0cf9:  rw in=00000000 out=000000db
>0cfa:  rw in=00000000 out=000000db
>0cfb:  rw in=00000000 out=000000db
>0cfc:  rw in=000000db out=00000000
>0cfd:  rw in=000000db out=00000000
>0cfe:  rw in=000000db out=00000000
>0cff:  rw in=000000db out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023c0 ; tsc
>msr[0011]    00000000005247f0 ; real tsc (previous)
>msr[0012]    0000000000524a6f ; real tsc, ratio=589.27
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001a5 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01a5): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01a5[bb]: 400x300+1200, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000db
>0cf9:  rw in=00000000 out=000000db
>0cfa:  rw in=00000000 out=000000db
>0cfb:  rw in=00000000 out=000000db
>0cfc:  rw in=000000db out=00000000
>0cfd:  rw in=000000db out=00000000
>0cfe:  rw in=000000db out=00000000
>0cff:  rw in=000000db out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023c8 ; tsc
>msr[0011]    000000000069dd64 ; real tsc (previous)
>msr[0012]    000000000069e005 ; real tsc, ratio=757.49
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001a6 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01a6): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x01a6[bb]: 400x300+1600, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000069
>0cf9:  rw in=00000000 out=00000069
>0cfa:  rw in=00000000 out=00000069
>0cfb:  rw in=00000000 out=00000069
>0cfc:  rw in=00000069 out=00000000
>0cfd:  rw in=00000069 out=00000000
>0cfe:  rw in=00000069 out=00000000
>0cff:  rw in=00000069 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000025 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000116c ; tsc
>msr[0011]    000000000029db33 ; real tsc (previous)
>msr[0012]    000000000029ddd0 ; real tsc, ratio=615.19
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001b2 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01b2): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01b2[bb]: 512x384+512, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000069
>0cf9:  rw in=00000000 out=00000069
>0cfa:  rw in=00000000 out=00000069
>0cfb:  rw in=00000000 out=00000069
>0cfc:  rw in=00000069 out=00000000
>0cfd:  rw in=00000069 out=00000000
>0cfe:  rw in=00000069 out=00000000
>0cff:  rw in=00000069 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000025 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000117d ; tsc
>msr[0011]    00000000002a040e ; real tsc (previous)
>msr[0012]    00000000002a068e ; real tsc, ratio=615.19
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001b3 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01b3): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01b3[bb]: 512x384+1024, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000069
>0cf9:  rw in=00000000 out=00000069
>0cfa:  rw in=00000000 out=00000069
>0cfb:  rw in=00000000 out=00000069
>0cfc:  rw in=00000069 out=00000000
>0cfd:  rw in=00000069 out=00000000
>0cfe:  rw in=00000069 out=00000000
>0cff:  rw in=00000069 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000025 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001189 ; tsc
>msr[0011]    000000000029ad76 ; real tsc (previous)
>msr[0012]    000000000029b00f ; real tsc, ratio=608.61
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001b4 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01b4): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01b4[bb]: 512x384+1024, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000069
>0cf9:  rw in=00000000 out=00000069
>0cfa:  rw in=00000000 out=00000069
>0cfb:  rw in=00000000 out=00000069
>0cfc:  rw in=00000069 out=00000000
>0cfd:  rw in=00000069 out=00000000
>0cfe:  rw in=00000069 out=00000000
>0cff:  rw in=00000069 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000025 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001199 ; tsc
>msr[0011]    00000000002ab697 ; real tsc (previous)
>msr[0012]    00000000002ab93b ; real tsc, ratio=621.52
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001b5 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01b5): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01b5[bb]: 512x384+1536, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000069
>0cf9:  rw in=00000000 out=00000069
>0cfa:  rw in=00000000 out=00000069
>0cfb:  rw in=00000000 out=00000069
>0cfc:  rw in=00000069 out=00000000
>0cfd:  rw in=00000069 out=00000000
>0cfe:  rw in=00000069 out=00000000
>0cff:  rw in=00000069 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000025 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000011a1 ; tsc
>msr[0011]    0000000000430fd7 ; real tsc (previous)
>msr[0012]    0000000000431280 ; real tsc, ratio=974.00
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001b6 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01b6): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01b6[bb]: 512x384+2048, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006b
>0cf9:  rw in=00000000 out=0000006b
>0cfa:  rw in=00000000 out=0000006b
>0cfb:  rw in=00000000 out=0000006b
>0cfc:  rw in=0000006b out=00000000
>0cfd:  rw in=0000006b out=00000000
>0cfe:  rw in=0000006b out=00000000
>0cff:  rw in=0000006b out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000026 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000011e6 ; tsc
>msr[0011]    00000000004316f0 ; real tsc (previous)
>msr[0012]    0000000000431988 ; real tsc, ratio=959.72
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001c2 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01c2): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01c2[bb]: 640x350+640, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006b
>0cf9:  rw in=00000000 out=0000006b
>0cfa:  rw in=00000000 out=0000006b
>0cfb:  rw in=00000000 out=0000006b
>0cfc:  rw in=0000006b out=00000000
>0cfd:  rw in=0000006b out=00000000
>0cfe:  rw in=0000006b out=00000000
>0cff:  rw in=0000006b out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000026 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000011f7 ; tsc
>msr[0011]    00000000002b1f16 ; real tsc (previous)
>msr[0012]    00000000002b21ac ; real tsc, ratio=614.63
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001c3 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01c3): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01c3[bb]: 640x350+1280, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006b
>0cf9:  rw in=00000000 out=0000006b
>0cfa:  rw in=00000000 out=0000006b
>0cfb:  rw in=00000000 out=0000006b
>0cfc:  rw in=0000006b out=00000000
>0cfd:  rw in=0000006b out=00000000
>0cfe:  rw in=0000006b out=00000000
>0cff:  rw in=0000006b out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000026 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001203 ; tsc
>msr[0011]    000000000042307d ; real tsc (previous)
>msr[0012]    000000000042331e ; real tsc, ratio=940.89
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001c4 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01c4): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01c4[bb]: 640x350+1280, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006b
>0cf9:  rw in=00000000 out=0000006b
>0cfa:  rw in=00000000 out=0000006b
>0cfb:  rw in=00000000 out=0000006b
>0cfc:  rw in=0000006b out=00000000
>0cfd:  rw in=0000006b out=00000000
>0cfe:  rw in=0000006b out=00000000
>0cff:  rw in=0000006b out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000026 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001213 ; tsc
>msr[0011]    00000000002acd3c ; real tsc (previous)
>msr[0012]    00000000002acfd1 ; real tsc, ratio=606.38
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001c5 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01c5): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x01c5[bb]: 640x350+1920, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006b
>0cf9:  rw in=00000000 out=0000006b
>0cfa:  rw in=00000000 out=0000006b
>0cfb:  rw in=00000000 out=0000006b
>0cfc:  rw in=0000006b out=00000000
>0cfd:  rw in=0000006b out=00000000
>0cfe:  rw in=0000006b out=00000000
>0cff:  rw in=0000006b out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000026 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000121b ; tsc
>msr[0011]    000000000043c20a ; real tsc (previous)
>msr[0012]    000000000043c49f ; real tsc, ratio=958.20
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=000001c6 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x01c6): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x01c6[bb]: 640x350+2560, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006d
>0cf9:  rw in=00000000 out=0000006d
>0cfa:  rw in=00000000 out=0000006d
>0cfb:  rw in=00000000 out=0000006d
>0cfc:  rw in=0000006d out=00000000
>0cfd:  rw in=0000006d out=00000000
>0cfe:  rw in=0000006d out=00000000
>0cff:  rw in=0000006d out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000027 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000125b ; tsc
>msr[0011]    00000000002b4868 ; real tsc (previous)
>msr[0012]    00000000002c8cc3 ; real tsc, ratio=621.33
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000100 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0100): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0100[bb]: 640x400+640, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006d
>0cf9:  rw in=00000000 out=0000006d
>0cfa:  rw in=00000000 out=0000006d
>0cfb:  rw in=00000000 out=0000006d
>0cfc:  rw in=0000006d out=00000000
>0cfd:  rw in=0000006d out=00000000
>0cfe:  rw in=0000006d out=00000000
>0cff:  rw in=0000006d out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000027 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000126c ; tsc
>msr[0011]    00000000002c8453 ; real tsc (previous)
>msr[0012]    00000000002c86e3 ; real tsc, ratio=618.77
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000183 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0183): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0183[bb]: 640x400+1280, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006d
>0cf9:  rw in=00000000 out=0000006d
>0cfa:  rw in=00000000 out=0000006d
>0cfb:  rw in=00000000 out=0000006d
>0cfc:  rw in=0000006d out=00000000
>0cfd:  rw in=0000006d out=00000000
>0cfe:  rw in=0000006d out=00000000
>0cff:  rw in=0000006d out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000027 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001278 ; tsc
>msr[0011]    00000000004118b5 ; real tsc (previous)
>msr[0012]    0000000000411c84 ; real tsc, ratio=902.53
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000184 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0184): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0184[bb]: 640x400+1280, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006d
>0cf9:  rw in=00000000 out=0000006d
>0cfa:  rw in=00000000 out=0000006d
>0cfb:  rw in=00000000 out=0000006d
>0cfc:  rw in=0000006d out=00000000
>0cfd:  rw in=0000006d out=00000000
>0cfe:  rw in=0000006d out=00000000
>0cff:  rw in=0000006d out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000027 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001288 ; tsc
>msr[0011]    00000000002ce566 ; real tsc (previous)
>msr[0012]    00000000002ce80c ; real tsc, ratio=620.36
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000185 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0185): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0185[bb]: 640x400+1920, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=0000006d
>0cf9:  rw in=00000000 out=0000006d
>0cfa:  rw in=00000000 out=0000006d
>0cfb:  rw in=00000000 out=0000006d
>0cfc:  rw in=0000006d out=00000000
>0cfd:  rw in=0000006d out=00000000
>0cfe:  rw in=0000006d out=00000000
>0cff:  rw in=0000006d out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000027 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001290 ; tsc
>msr[0011]    00000000002d29fc ; real tsc (previous)
>msr[0012]    00000000002d2c89 ; real tsc, ratio=623.01
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000186 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0186): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0186[bb]: 640x400+2560, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000d5
>0cf9:  rw in=00000000 out=000000d5
>0cfa:  rw in=00000000 out=000000d5
>0cfb:  rw in=00000000 out=000000d5
>0cfc:  rw in=000000d5 out=00000000
>0cfd:  rw in=000000d5 out=00000000
>0cfe:  rw in=000000d5 out=00000000
>0cff:  rw in=000000d5 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005b out=00000000
>2018:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000224e ; tsc
>msr[0011]    000000000066f0a9 ; real tsc (previous)
>msr[0012]    000000000066f33f ; real tsc, ratio=768.27
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000101 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0101): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0101[bb]: 640x480+640, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000d5
>0cf9:  rw in=00000000 out=000000d5
>0cfa:  rw in=00000000 out=000000d5
>0cfb:  rw in=00000000 out=000000d5
>0cfc:  rw in=000000d5 out=00000000
>0cfd:  rw in=000000d5 out=00000000
>0cfe:  rw in=000000d5 out=00000000
>0cff:  rw in=000000d5 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005b out=00000000
>2018:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000225f ; tsc
>msr[0011]    000000000066c41a ; real tsc (previous)
>msr[0012]    000000000066c6c4 ; real tsc, ratio=765.49
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000110 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0110): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0110[bb]: 640x480+1280, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000d5
>0cf9:  rw in=00000000 out=000000d5
>0cfa:  rw in=00000000 out=000000d5
>0cfb:  rw in=00000000 out=000000d5
>0cfc:  rw in=000000d5 out=00000000
>0cfd:  rw in=000000d5 out=00000000
>0cfe:  rw in=000000d5 out=00000000
>0cff:  rw in=000000d5 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005b out=00000000
>2018:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000226b ; tsc
>msr[0011]    000000000066f9c0 ; real tsc (previous)
>msr[0012]    000000000066fc6d ; real tsc, ratio=766.01
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000111 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0111): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0111[bb]: 640x480+1280, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000d5
>0cf9:  rw in=00000000 out=000000d5
>0cfa:  rw in=00000000 out=000000d5
>0cfb:  rw in=00000000 out=000000d5
>0cfc:  rw in=000000d5 out=00000000
>0cfd:  rw in=000000d5 out=00000000
>0cfe:  rw in=000000d5 out=00000000
>0cff:  rw in=000000d5 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005b out=00000000
>2018:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000227b ; tsc
>msr[0011]    0000000000b5db88 ; real tsc (previous)
>msr[0012]    0000000000b5df94 ; real tsc, ratio=1350.32
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000112 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0112): ok (time 0.007s, eax 0x4f, err = 0x0)
>  0x0112[bb]: 640x480+1920, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000d5
>0cf9:  rw in=00000000 out=000000d5
>0cfa:  rw in=00000000 out=000000d5
>0cfb:  rw in=00000000 out=000000d5
>0cfc:  rw in=000000d5 out=00000000
>0cfd:  rw in=000000d5 out=00000000
>0cfe:  rw in=000000d5 out=00000000
>0cff:  rw in=000000d5 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005b out=00000000
>2018:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000002283 ; tsc
>msr[0011]    00000000004f181b ; real tsc (previous)
>msr[0012]    00000000004f1aac ; real tsc, ratio=586.78
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000121 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0121): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0121[bb]: 640x480+2560, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000dd
>0cf9:  rw in=00000000 out=000000dd
>0cfa:  rw in=00000000 out=000000dd
>0cfb:  rw in=00000000 out=000000dd
>0cfc:  rw in=000000dd out=00000000
>0cfd:  rw in=000000dd out=00000000
>0cfe:  rw in=000000dd out=00000000
>0cff:  rw in=000000dd out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023bb ; tsc
>msr[0011]    000000000069f0c4 ; real tsc (previous)
>msr[0012]    000000000069f38e ; real tsc, ratio=759.12
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000103 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0103): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0103[bb]: 800x600+800, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000dd
>0cf9:  rw in=00000000 out=000000dd
>0cfa:  rw in=00000000 out=000000dd
>0cfb:  rw in=00000000 out=000000dd
>0cfc:  rw in=000000dd out=00000000
>0cfd:  rw in=000000dd out=00000000
>0cfe:  rw in=000000dd out=00000000
>0cff:  rw in=000000dd out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023cc ; tsc
>msr[0011]    0000000000a89f38 ; real tsc (previous)
>msr[0012]    0000000000a8a413 ; real tsc, ratio=1206.03
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000113 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0113): ok (time 0.007s, eax 0x4f, err = 0x0)
>  0x0113[bb]: 800x600+1600, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000dd
>0cf9:  rw in=00000000 out=000000dd
>0cfa:  rw in=00000000 out=000000dd
>0cfb:  rw in=00000000 out=000000dd
>0cfc:  rw in=000000dd out=00000000
>0cfd:  rw in=000000dd out=00000000
>0cfe:  rw in=000000dd out=00000000
>0cff:  rw in=000000dd out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023d8 ; tsc
>msr[0011]    0000000000524fd6 ; real tsc (previous)
>msr[0012]    000000000052527c ; real tsc, ratio=587.95
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000114 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0114): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0114[bb]: 800x600+1600, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000dd
>0cf9:  rw in=00000000 out=000000dd
>0cfa:  rw in=00000000 out=000000dd
>0cfb:  rw in=00000000 out=000000dd
>0cfc:  rw in=000000dd out=00000000
>0cfd:  rw in=000000dd out=00000000
>0cfe:  rw in=000000dd out=00000000
>0cff:  rw in=000000dd out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023e8 ; tsc
>msr[0011]    00000000005db79e ; real tsc (previous)
>msr[0012]    00000000005dbde2 ; real tsc, ratio=668.35
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000115 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0115): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0115[bb]: 800x600+2400, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000dd
>0cf9:  rw in=00000000 out=000000dd
>0cfa:  rw in=00000000 out=000000dd
>0cfb:  rw in=00000000 out=000000dd
>0cfc:  rw in=000000dd out=00000000
>0cfd:  rw in=000000dd out=00000000
>0cfe:  rw in=000000dd out=00000000
>0cff:  rw in=000000dd out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000005f out=00000000
>2019:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000023f0 ; tsc
>msr[0011]    000000000051a226 ; real tsc (previous)
>msr[0012]    000000000051a4b3 ; real tsc, ratio=581.58
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000122 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0122): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0122[bb]: 800x600+3200, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000e7
>0cf9:  rw in=00000000 out=000000e7
>0cfa:  rw in=00000000 out=000000e7
>0cfb:  rw in=00000000 out=000000e7
>0cfc:  rw in=000000e7 out=00000000
>0cfd:  rw in=000000e7 out=00000000
>0cfe:  rw in=000000e7 out=00000000
>0cff:  rw in=000000e7 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000064 out=00000000
>201a:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000257a ; tsc
>msr[0011]    00000000006d3ada ; real tsc (previous)
>msr[0012]    00000000006d3d65 ; real tsc, ratio=746.21
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000105 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0105): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0105[bb]: 1024x768+1024, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000e7
>0cf9:  rw in=00000000 out=000000e7
>0cfa:  rw in=00000000 out=000000e7
>0cfb:  rw in=00000000 out=000000e7
>0cfc:  rw in=000000e7 out=00000000
>0cfd:  rw in=000000e7 out=00000000
>0cfe:  rw in=000000e7 out=00000000
>0cff:  rw in=000000e7 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000064 out=00000000
>201a:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000258b ; tsc
>msr[0011]    0000000000bda019 ; real tsc (previous)
>msr[0012]    0000000000bda87b ; real tsc, ratio=1293.25
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000116 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0116): ok (time 0.008s, eax 0x4f, err = 0x0)
>  0x0116[bb]: 1024x768+2048, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000e7
>0cf9:  rw in=00000000 out=000000e7
>0cfa:  rw in=00000000 out=000000e7
>0cfb:  rw in=00000000 out=000000e7
>0cfc:  rw in=000000e7 out=00000000
>0cfd:  rw in=000000e7 out=00000000
>0cfe:  rw in=000000e7 out=00000000
>0cff:  rw in=000000e7 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000064 out=00000000
>201a:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000002597 ; tsc
>msr[0011]    00000000005689a7 ; real tsc (previous)
>msr[0012]    0000000000568c3e ; real tsc, ratio=589.42
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000117 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0117): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0117[bb]: 1024x768+2048, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000e7
>0cf9:  rw in=00000000 out=000000e7
>0cfa:  rw in=00000000 out=000000e7
>0cfb:  rw in=00000000 out=000000e7
>0cfc:  rw in=000000e7 out=00000000
>0cfd:  rw in=000000e7 out=00000000
>0cfe:  rw in=000000e7 out=00000000
>0cff:  rw in=000000e7 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000064 out=00000000
>201a:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000025a7 ; tsc
>msr[0011]    000000000056062d ; real tsc (previous)
>msr[0012]    00000000005608c2 ; real tsc, ratio=584.95
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000118 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0118): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0118[bb]: 1024x768+3072, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000e7
>0cf9:  rw in=00000000 out=000000e7
>0cfa:  rw in=00000000 out=000000e7
>0cfb:  rw in=00000000 out=000000e7
>0cfc:  rw in=000000e7 out=00000000
>0cfd:  rw in=000000e7 out=00000000
>0cfe:  rw in=000000e7 out=00000000
>0cff:  rw in=000000e7 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=00000064 out=00000000
>201a:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000025af ; tsc
>msr[0011]    00000000006dbb2b ; real tsc (previous)
>msr[0012]    00000000006dbdd2 ; real tsc, ratio=745.52
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000123 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0123): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0123[bb]: 1024x768+4096, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000f3
>0cf9:  rw in=00000000 out=000000f3
>0cfa:  rw in=00000000 out=000000f3
>0cfb:  rw in=00000000 out=000000f3
>0cfc:  rw in=000000f3 out=00000000
>0cfd:  rw in=000000f3 out=00000000
>0cfe:  rw in=000000f3 out=00000000
>0cff:  rw in=000000f3 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000006a out=00000000
>201b:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000279b ; tsc
>msr[0011]    000000000059d5e2 ; real tsc (previous)
>msr[0012]    000000000059d88e ; real tsc, ratio=580.74
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000107 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0107): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0107[bb]: 1280x1024+1280, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000f3
>0cf9:  rw in=00000000 out=000000f3
>0cfa:  rw in=00000000 out=000000f3
>0cfb:  rw in=00000000 out=000000f3
>0cfc:  rw in=000000f3 out=00000000
>0cfd:  rw in=000000f3 out=00000000
>0cfe:  rw in=000000f3 out=00000000
>0cff:  rw in=000000f3 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000006a out=00000000
>201b:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000027ac ; tsc
>msr[0011]    00000000005b42c0 ; real tsc (previous)
>msr[0012]    00000000005b4554 ; real tsc, ratio=588.96
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000119 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0119): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0119[bb]: 1280x1024+2560, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000f3
>0cf9:  rw in=00000000 out=000000f3
>0cfa:  rw in=00000000 out=000000f3
>0cfb:  rw in=00000000 out=000000f3
>0cfc:  rw in=000000f3 out=00000000
>0cfd:  rw in=000000f3 out=00000000
>0cfe:  rw in=000000f3 out=00000000
>0cff:  rw in=000000f3 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000006a out=00000000
>201b:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000027b8 ; tsc
>msr[0011]    00000000005a0cef ; real tsc (previous)
>msr[0012]    00000000005a0f7c ; real tsc, ratio=580.47
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=0000011a edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x011a): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x011a[bb]: 1280x1024+2560, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000f3
>0cf9:  rw in=00000000 out=000000f3
>0cfa:  rw in=00000000 out=000000f3
>0cfb:  rw in=00000000 out=000000f3
>0cfc:  rw in=000000f3 out=00000000
>0cfd:  rw in=000000f3 out=00000000
>0cfe:  rw in=000000f3 out=00000000
>0cff:  rw in=000000f3 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000006a out=00000000
>201b:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000027c8 ; tsc
>msr[0011]    000000000059bb60 ; real tsc (previous)
>msr[0012]    000000000059bded ; real tsc, ratio=577.51
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=0000011b edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x011b): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x011b[bb]: 1280x1024+3840, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=000000f3
>0cf9:  rw in=00000000 out=000000f3
>0cfa:  rw in=00000000 out=000000f3
>0cfb:  rw in=00000000 out=000000f3
>0cfc:  rw in=000000f3 out=00000000
>0cfd:  rw in=000000f3 out=00000000
>0cfe:  rw in=000000f3 out=00000000
>0cff:  rw in=000000f3 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000006a out=00000000
>201b:  rw in=00000001 out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>2029:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000027d0 ; tsc
>msr[0011]    0000000000599078 ; real tsc (previous)
>msr[0012]    0000000000599310 ; real tsc, ratio=575.98
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000124 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0124): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0124[bb]: 1280x1024+5120, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003d out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000019ce ; tsc
>msr[0011]    00000000003b8eb0 ; real tsc (previous)
>msr[0012]    00000000003b913f ; real tsc, ratio=590.95
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000140 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0140): ok (time 0.004s, eax 0x4f, err = 0x0)
>  0x0140[bb]: 1400x1050+1400, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003d out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000019df ; tsc
>msr[0011]    00000000003be5ce ; real tsc (previous)
>msr[0012]    00000000003be855 ; real tsc, ratio=592.80
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000141 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0141): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0141[bb]: 1400x1050+2800, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003d out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000019eb ; tsc
>msr[0011]    00000000003cf038 ; real tsc (previous)
>msr[0012]    00000000003cf2cf ; real tsc, ratio=602.01
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000142 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0142): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0142[bb]: 1400x1050+2800, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003d out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    00000000000019fb ; tsc
>msr[0011]    00000000003c3fd8 ; real tsc (previous)
>msr[0012]    00000000003c426f ; real tsc, ratio=593.77
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000143 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0143): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0143[bb]: 1400x1050+4200, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003d out=00000000
>201f:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2023:  rw in=00000001 out=00000001
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000003 out=00000000
>20fb:  rw in=00000003 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001a03 ; tsc
>msr[0011]    0000000000507cca ; real tsc (previous)
>msr[0012]    0000000000507f89 ; real tsc, ratio=792.24
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000144 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0144): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0144[bb]: 1400x1050+5600, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003e out=00000000
>201c:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001967 ; tsc
>msr[0011]    00000000003a418d ; real tsc (previous)
>msr[0012]    00000000003a4419 ; real tsc, ratio=587.19
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000172 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0172): ok (time 0.002s, eax 0x4f, err = 0x0)
>  0x0172[ba]: 1600x1200+1600, 8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003e out=00000000
>201c:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001978 ; tsc
>msr[0011]    00000000003add82 ; real tsc (previous)
>msr[0012]    00000000003ae015 ; real tsc, ratio=591.79
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000173 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0173): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0173[ba]: 1600x1200+3200, 15 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003e out=00000000
>201c:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001984 ; tsc
>msr[0011]    000000000087024b ; real tsc (previous)
>msr[0012]    000000000087085d ; real tsc, ratio=1354.79
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000174 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0174): ok (time 0.005s, eax 0x4f, err = 0x0)
>  0x0174[ba]: 1600x1200+3200, 16 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003e out=00000000
>201c:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    0000000000001994 ; tsc
>msr[0011]    00000000003ae28b ; real tsc (previous)
>msr[0012]    00000000003ae529 ; real tsc, ratio=589.46
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000175 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0175): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0175[ba]: 1600x1200+4800, 24 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k
>=== emulation log ===
>
>; - - - final state
>; - - memory
>;           0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f
>
>; - - io accesses
>0cf8:  rw in=00000000 out=00000095
>0cf9:  rw in=00000000 out=00000095
>0cfa:  rw in=00000000 out=00000095
>0cfb:  rw in=00000000 out=00000095
>0cfc:  rw in=00000095 out=00000000
>0cfd:  rw in=00000095 out=00000000
>0cfe:  rw in=00000095 out=00000000
>0cff:  rw in=00000095 out=00000000
>2000:  rw in=00000001 out=00000002
>2001:  rw in=00000001 out=00000002
>2002:  rw in=00000001 out=00000002
>2003:  rw in=00000001 out=00000002
>2006:  rw in=00000001 out=00000000
>2007:  rw in=00000001 out=00000000
>2008:  rw in=00000002 out=00000004
>2009:  rw in=00000001 out=00000001
>200c:  rw in=00000001 out=00000000
>200d:  rw in=00000002 out=00000000
>200e:  rw in=00000001 out=00000000
>200f:  rw in=00000001 out=00000000
>2010:  rw in=0000003e out=00000000
>201c:  rw in=00000001 out=00000000
>2020:  rw in=00000001 out=00000000
>2027:  rw in=00000001 out=00000000
>20fa:  rw in=00000004 out=00000000
>20fb:  rw in=00000004 out=00000000
>
>; - - interrupt statistics
>int 10: 00000001
>
>; - - registers
>msr[0010]    000000000000199c ; tsc
>msr[0011]    000000000053a884 ; real tsc (previous)
>msr[0012]    000000000053ab20 ; real tsc, ratio=836.38
>
>cr0=00000000 cr1=00000000 cr2=00000000 cr3=00000000 cr4=00000000
>dr0=00000000 dr1=00000000 dr2=00000000 dr3=00000000 dr6=00000000 dr7=00000000
>
>gdt.base=00000000 gdt.limit=ffff
>idt.base=00000000 idt.limit=ffff
>tr=0000 tr.base=00000000 tr.limit=00000000 tr.acc=0000
>ldt=0000 ldt.base=00000000 ldt.limit=00000000 ldt.acc=0000
>
>cs=0000 cs.base=00000000 cs.limit=0000ffff cs.acc=009b
>ss=0000 ss.base=00000000 ss.limit=0000ffff ss.acc=0093
>ds=0000 ds.base=00000000 ds.limit=0000ffff ds.acc=0093
>es=0000 es.base=00000000 es.limit=0000ffff es.acc=0093
>fs=0000 fs.base=00000000 fs.limit=0000ffff fs.acc=0093
>gs=0000 gs.base=00000000 gs.limit=0000ffff gs.acc=0093
>
>eax=0000004f ebx=00000000 ecx=00000176 edx=00000000
>esi=00000000 edi=00008000 ebp=00000000 esp=00000000
>eip=00007c03 eflags=00000002
>
>; - - -
>=== emulation log end ===
>=== vbe get mode info (0x0176): ok (time 0.003s, eax 0x4f, err = 0x0)
>  0x0176[ba]: 1600x1200+6400, 24+8 bpp, fb: 0x98000000, a0000.7/a0000.0: 64k

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Attachments on bug 590242: 349949 | 350048 | 350606 | 350615