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(-)a/target/i386/cpu.c (-1 / +1 lines)
Lines 459-465 static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { Link Here
459 
            NULL, NULL, NULL, NULL,
 459 
            NULL, NULL, NULL, NULL,
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            NULL, NULL, NULL, NULL,
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            NULL, NULL, NULL, NULL,
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            NULL, NULL, "spec-ctrl", NULL,
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            NULL, NULL, "spec-ctrl", NULL,
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            NULL, NULL, NULL, NULL,
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            NULL, NULL, NULL, "rds",
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        },
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        },
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        .cpuid_eax = 7,
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        .cpuid_eax = 7,
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        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
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        .cpuid_needs_ecx = true, .cpuid_ecx = 0,
(-)a/target/i386/cpu.h (-1 / +1 lines)
Lines 650-655 typedef uint32_t FeatureWordArray[FEATURE_WORDS]; Link Here
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_SPEC_CTRL     (1U << 26) /* Speculation Control */
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#define CPUID_7_0_EDX_SPEC_CTRL     (1U << 26) /* Speculation Control */
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#define CPUID_7_0_EDX_SPEC_CTRL_RDS  (1U << 31) /* Reduced Data Speculation */
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          654
          
#define CPUID_8000_0008_EBX_IBPB    (1U << 12) /* Indirect Branch Prediction Barrier */

          655
          
#define CPUID_8000_0008_EBX_IBPB    (1U << 12) /* Indirect Branch Prediction Barrier */

        

        

          655
          

          656
          

        

            

              656
              
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